From 4c1d76dc8c894932d61d877c238d9664ead349ad Mon Sep 17 00:00:00 2001 From: ferreo Date: Fri, 6 Dec 2024 21:54:00 +0100 Subject: [PATCH] Add patches/jones.patch --- patches/jones.patch | 96 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 patches/jones.patch diff --git a/patches/jones.patch b/patches/jones.patch new file mode 100644 index 0000000..2d0a67e --- /dev/null +++ b/patches/jones.patch @@ -0,0 +1,96 @@ +From b302d9fec18b7c3c045ae53f980824e8734b92f3 Mon Sep 17 00:00:00 2001 +From: Samuel Pitoiset +Date: Fri, 6 Dec 2024 16:25:18 +0100 +Subject: [PATCH] radv: add radv_disable_dcc_stores and enable for Indiana + Jones: The Great Circle + +Likely a game bug but can't be 100% sure because the game uses RT by +default and renderdoc still doesn't have support for it. + +Cc: mesa-stable +Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12257 +Signed-off-by: Samuel Pitoiset +--- + src/amd/vulkan/radv_image.c | 4 ++++ + src/amd/vulkan/radv_instance.c | 2 ++ + src/amd/vulkan/radv_instance.h | 1 + + src/util/00-radv-defaults.conf | 1 + + src/util/driconf.h | 4 ++++ + 5 files changed, 12 insertions(+) + +diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c +index f7583e4441cef..605207112a58e 100644 +--- a/src/amd/vulkan/radv_image.c ++++ b/src/amd/vulkan/radv_image.c +@@ -295,6 +295,10 @@ radv_use_dcc_for_image_early(struct radv_device *device, struct radv_image *imag + if (instance->drirc.disable_dcc_mips && pCreateInfo->mipLevels > 1) + return false; + ++ /* Force disable DCC for stores to workaround game bugs. */ ++ if (instance->drirc.disable_dcc_stores && (pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT)) ++ return false; ++ + /* DCC MSAA can't work on GFX10.3 and earlier without FMASK. */ + if (pCreateInfo->samples > 1 && pdev->info.gfx_level < GFX11 && (instance->debug_flags & RADV_DEBUG_NO_FMASK)) + return false; +diff --git a/src/amd/vulkan/radv_instance.c b/src/amd/vulkan/radv_instance.c +index cacb7f86279db..eebdaed6e3bec 100644 +--- a/src/amd/vulkan/radv_instance.c ++++ b/src/amd/vulkan/radv_instance.c +@@ -174,6 +174,7 @@ static const driOptionDescription radv_dri_options[] = { + DRI_CONF_RADV_DISABLE_TC_COMPAT_HTILE_GENERAL(false) + DRI_CONF_RADV_DISABLE_DCC(false) + DRI_CONF_RADV_DISABLE_DCC_MIPS(false) ++ DRI_CONF_RADV_DISABLE_DCC_STORES(false) + DRI_CONF_RADV_DISABLE_ANISO_SINGLE_LEVEL(false) + DRI_CONF_RADV_DISABLE_TRUNC_COORD(false) + DRI_CONF_RADV_DISABLE_SINKING_LOAD_INPUT_FS(false) +@@ -282,6 +283,7 @@ radv_init_dri_options(struct radv_instance *instance) + instance->drirc.vk_require_astc = driQueryOptionb(&instance->drirc.options, "vk_require_astc"); + + instance->drirc.disable_dcc_mips = driQueryOptionb(&instance->drirc.options, "radv_disable_dcc_mips"); ++ instance->drirc.disable_dcc_stores = driQueryOptionb(&instance->drirc.options, "radv_disable_dcc_stores"); + } + + static const struct vk_instance_extension_table radv_instance_extensions_supported = { +diff --git a/src/amd/vulkan/radv_instance.h b/src/amd/vulkan/radv_instance.h +index 88880135fa66e..a7e0645ae7621 100644 +--- a/src/amd/vulkan/radv_instance.h ++++ b/src/amd/vulkan/radv_instance.h +@@ -72,6 +72,7 @@ struct radv_instance { + bool vk_require_etc2; + bool vk_require_astc; + bool disable_dcc_mips; ++ bool disable_dcc_stores; + char *app_layer; + uint8_t override_graphics_shader_version; + uint8_t override_compute_shader_version; +diff --git a/src/util/00-radv-defaults.conf b/src/util/00-radv-defaults.conf +index a5718a53ea0c8..1d8ca7d5f1a1b 100644 +--- a/src/util/00-radv-defaults.conf ++++ b/src/util/00-radv-defaults.conf +@@ -111,6 +111,7 @@ Application bugs worked around in this file: + + + + +diff --git a/src/util/driconf.h b/src/util/driconf.h +index 0c85305d171b3..5e71e49e1fcc9 100644 +--- a/src/util/driconf.h ++++ b/src/util/driconf.h +@@ -696,6 +696,10 @@ + DRI_CONF_OPT_B(radv_disable_dcc_mips, def, \ + "Disable DCC for color images with mips") + ++#define DRI_CONF_RADV_DISABLE_DCC_STORES(def) \ ++ DRI_CONF_OPT_B(radv_disable_dcc_stores, def, \ ++ "Disable DCC for color storage images") ++ + #define DRI_CONF_RADV_DISABLE_ANISO_SINGLE_LEVEL(def) \ + DRI_CONF_OPT_B(radv_disable_aniso_single_level, def, \ + "Disable anisotropic filtering for single level images") +-- +