Update 21929.patch

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ferrreo 2023-09-02 13:38:04 +01:00 committed by GitHub
parent f24ebc5bf0
commit c96ecf2e71
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@ -1,4 +1,4 @@
From b52779b8fa24d3e6f23b4db4cfa4116f1149d6eb Mon Sep 17 00:00:00 2001
From ed9fb6be100cff6c2066beb0cdf8b3a17cab292c Mon Sep 17 00:00:00 2001
From: Konstantin Seurer <konstantin.seurer@gmail.com>
Date: Sat, 24 Jun 2023 15:49:13 +0200
Subject: [PATCH 1/4] radv: Add rt.monolithic to radv_pipeline_key
@ -8,7 +8,7 @@ Subject: [PATCH 1/4] radv: Add rt.monolithic to radv_pipeline_key
1 file changed, 4 insertions(+)
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 9156f28f34dc..a8ea3aab13d4 100644
index 0c53695edae7c..6eb95fdd0a097 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -135,6 +135,10 @@ struct radv_pipeline_key {
@ -23,10 +23,9 @@ index 9156f28f34dc..a8ea3aab13d4 100644
struct radv_nir_compiler_options {
--
GitLab
From 69761a71f9dbfefe9a8bf13a310ae7004962e786 Mon Sep 17 00:00:00 2001
From 8f45cc08361f55c1e613a11198b1ae97c519406e Mon Sep 17 00:00:00 2001
From: Konstantin Seurer <konstantin.seurer@gmail.com>
Date: Sat, 24 Jun 2023 15:46:51 +0200
Subject: [PATCH 2/4] radv/rt: Store NIR shaders separately
@ -34,14 +33,14 @@ Subject: [PATCH 2/4] radv/rt: Store NIR shaders separately
In order to compile monolithic shaders with pipeline libraries, we need
to keep the NIR around for inlining recursive stages.
---
src/amd/vulkan/radv_pipeline_cache.c | 9 ++--
src/amd/vulkan/radv_pipeline_rt.c | 81 ++++++++++++++++++++--------
src/amd/vulkan/radv_pipeline_cache.c | 9 +--
src/amd/vulkan/radv_pipeline_rt.c | 93 +++++++++++++++++++++-------
src/amd/vulkan/radv_private.h | 1 +
src/amd/vulkan/radv_rt_shader.c | 7 ++-
4 files changed, 67 insertions(+), 31 deletions(-)
src/amd/vulkan/radv_rt_shader.c | 7 +--
4 files changed, 79 insertions(+), 31 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c
index 5bbbc755ae11..7e4c6f889813 100644
index 5bbbc755ae11f..7e4c6f8898130 100644
--- a/src/amd/vulkan/radv_pipeline_cache.c
+++ b/src/amd/vulkan/radv_pipeline_cache.c
@@ -481,11 +481,12 @@ radv_ray_tracing_pipeline_cache_search(struct radv_device *device, struct vk_pip
@ -62,7 +61,7 @@ index 5bbbc755ae11..7e4c6f889813 100644
}
diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c
index c86ea3a50846..21be900bb3dd 100644
index c86ea3a508468..85afc8cb28e1b 100644
--- a/src/amd/vulkan/radv_pipeline_rt.c
+++ b/src/amd/vulkan/radv_pipeline_rt.c
@@ -263,7 +263,10 @@ radv_rt_fill_stage_info(const VkRayTracingPipelineCreateInfoKHR *pCreateInfo, st
@ -77,7 +76,7 @@ index c86ea3a50846..21be900bb3dd 100644
stages[idx].stage = library_pipeline->stages[j].stage;
stages[idx].stack_size = library_pipeline->stages[j].stack_size;
memcpy(stages[idx].sha1, library_pipeline->stages[j].sha1, SHA1_DIGEST_LENGTH);
@@ -462,45 +465,71 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
@@ -462,45 +465,83 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
return VK_PIPELINE_COMPILE_REQUIRED;
VkResult result = VK_SUCCESS;
@ -87,6 +86,14 @@ index c86ea3a50846..21be900bb3dd 100644
+ struct radv_shader_stage *stages = calloc(pCreateInfo->stageCount, sizeof(struct radv_shader_stage));
+ if (!stages)
+ return VK_ERROR_OUT_OF_HOST_MEMORY;
+
+ bool has_callable = false;
+ for (uint32_t i = 0; i < pipeline->stage_count; i++) {
+ if (pipeline->stages[i].stage == MESA_SHADER_CALLABLE) {
+ has_callable = true;
+ break;
+ }
+ }
for (uint32_t idx = 0; idx < pCreateInfo->stageCount; idx++) {
+ if (rt_stages[idx].shader || rt_stages[idx].nir)
@ -107,12 +114,15 @@ index c86ea3a50846..21be900bb3dd 100644
+
+ /* Cases in which we need to keep around the NIR:
+ * - pipeline library: The final pipeline might be monolithic in which case it will need every NIR shader.
+ * If there is a callable shader, we can be sure that the final pipeline won't be
+ * monolithic.
+ * - non-recursive: Non-recursive shaders are inlined into the traversal shader.
+ * - monolithic: Callable shaders (chit/miss) are inlined into the raygen shader.
+ */
+ bool compiled = radv_ray_tracing_stage_is_compiled(&rt_stages[idx]);
+ bool library = pCreateInfo->flags & VK_PIPELINE_CREATE_LIBRARY_BIT_KHR;
+ bool nir_needed = library || !compiled || (key->rt.monolithic && rt_stages[idx].stage != MESA_SHADER_RAYGEN);
+ bool nir_needed =
+ (library && !has_callable) || !compiled || (key->rt.monolithic && rt_stages[idx].stage != MESA_SHADER_RAYGEN);
+ nir_needed &= !rt_stages[idx].nir;
+ if (nir_needed) {
+ rt_stages[idx].stack_size = stage->nir->scratch_size;
@ -130,9 +140,10 @@ index c86ea3a50846..21be900bb3dd 100644
+ struct radv_shader_stage *stage = &stages[idx];
+
+ /* Cases in which we need to compile the shader (raygen/callable/chit/miss):
+ * TODO: - monolithic: Force compilation if there already is a compiled shader
+ * since pipeline library shaders use separate compilation.
+ * TODO: - monolithic: Extend the loop to cover imported stages and force compilation of imported raygen
+ * shaders since pipeline library shaders use separate compilation.
+ * - separate: Compile any recursive stage if wasn't compiled yet.
+ * TODO: Skip chit and miss shaders in the monolithic case.
+ */
+ bool shader_needed = radv_ray_tracing_stage_is_compiled(&rt_stages[idx]) && !rt_stages[idx].shader;
+ if (shader_needed) {
@ -166,12 +177,12 @@ index c86ea3a50846..21be900bb3dd 100644
assert(idx < creation_feedback->pipelineStageCreationFeedbackCount);
- stage.feedback.duration = os_time_get_nano() - stage_start;
- creation_feedback->pPipelineStageCreationFeedbacks[idx] = stage.feedback;
+ stage->feedback.duration = os_time_get_nano() - stage_start;
+ stage->feedback.duration += os_time_get_nano() - stage_start;
+ creation_feedback->pPipelineStageCreationFeedbacks[idx] = stage->feedback;
}
}
@@ -527,6 +556,10 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
@@ -527,6 +568,10 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
result = radv_rt_nir_to_asm(device, cache, pCreateInfo, key, pipeline, &traversal_stage, NULL, NULL,
&pipeline->base.base.shaders[MESA_SHADER_INTERSECTION]);
@ -182,7 +193,7 @@ index c86ea3a50846..21be900bb3dd 100644
return result;
}
@@ -732,6 +765,8 @@ void
@@ -732,6 +777,8 @@ void
radv_destroy_ray_tracing_pipeline(struct radv_device *device, struct radv_ray_tracing_pipeline *pipeline)
{
for (unsigned i = 0; i < pipeline->stage_count; i++) {
@ -192,7 +203,7 @@ index c86ea3a50846..21be900bb3dd 100644
vk_pipeline_cache_object_unref(&device->vk, pipeline->stages[i].shader);
}
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index d51cbd3e173f..06755bba70b9 100644
index 47e315488e9f9..7ab46738b46f0 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -2364,6 +2364,7 @@ struct radv_ray_tracing_group {
@ -204,7 +215,7 @@ index d51cbd3e173f..06755bba70b9 100644
gl_shader_stage stage;
uint32_t stack_size;
diff --git a/src/amd/vulkan/radv_rt_shader.c b/src/amd/vulkan/radv_rt_shader.c
index cc92beebc350..3def324bcccf 100644
index cc92beebc3503..3def324bcccf3 100644
--- a/src/amd/vulkan/radv_rt_shader.c
+++ b/src/amd/vulkan/radv_rt_shader.c
@@ -1132,7 +1132,7 @@ visit_any_hit_shaders(struct radv_device *device, nir_builder *b, struct travers
@ -236,7 +247,7 @@ index cc92beebc350..3def324bcccf 100644
GitLab
From f3715521ae26fca036ba0a9bb2c700b3c9a59a10 Mon Sep 17 00:00:00 2001
From bba42cbc235e75a5c7ed05e55e48f71640c68ad4 Mon Sep 17 00:00:00 2001
From: Konstantin Seurer <konstantin.seurer@gmail.com>
Date: Mon, 21 Aug 2023 13:32:53 +0200
Subject: [PATCH 3/4] radv/rt: Add monolithic raygen lowering
@ -250,7 +261,7 @@ spilling.
3 files changed, 248 insertions(+), 42 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c
index 21be900bb3dd..00bdd6244432 100644
index 85afc8cb28e1b..12562c6cf89ba 100644
--- a/src/amd/vulkan/radv_pipeline_rt.c
+++ b/src/amd/vulkan/radv_pipeline_rt.c
@@ -356,9 +356,8 @@ move_rt_instructions(nir_shader *shader)
@ -271,7 +282,7 @@ index 21be900bb3dd..00bdd6244432 100644
- if (stage->stage != MESA_SHADER_INTERSECTION) {
+ bool monolithic_raygen = pipeline_key->rt.monolithic && stage->stage == MESA_SHADER_RAYGEN;
+ if (!monolithic_raygen && stage->stage != MESA_SHADER_INTERSECTION) {
+ if (stage->stage != MESA_SHADER_INTERSECTION && !monolithic_raygen) {
nir_builder b = nir_builder_at(nir_after_cf_list(&nir_shader_get_entrypoint(stage->nir)->body));
nir_rt_return_amd(&b);
@ -286,7 +297,7 @@ index 21be900bb3dd..00bdd6244432 100644
radv_postprocess_nir(device, pipeline_key, &temp_stage);
diff --git a/src/amd/vulkan/radv_rt_shader.c b/src/amd/vulkan/radv_rt_shader.c
index 3def324bcccf..362d91859700 100644
index 3def324bcccf3..362d918597008 100644
--- a/src/amd/vulkan/radv_rt_shader.c
+++ b/src/amd/vulkan/radv_rt_shader.c
@@ -1306,6 +1306,87 @@ handle_candidate_aabb(nir_builder *b, struct radv_leaf_intersection *intersectio
@ -617,10 +628,10 @@ index 3def324bcccf..362d91859700 100644
nir_metadata_preserve(impl, nir_metadata_none);
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index a8ea3aab13d4..d2be3cc9ea01 100644
index 6eb95fdd0a097..969f9a56ab7f5 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -632,7 +632,8 @@ nir_shader *radv_parse_rt_stage(struct radv_device *device, const VkPipelineShad
@@ -635,7 +635,8 @@ nir_shader *radv_parse_rt_stage(struct radv_device *device, const VkPipelineShad
void radv_nir_lower_rt_abi(nir_shader *shader, const VkRayTracingPipelineCreateInfoKHR *pCreateInfo,
const struct radv_shader_args *args, const struct radv_shader_info *info,
@ -631,10 +642,9 @@ index a8ea3aab13d4..d2be3cc9ea01 100644
struct radv_shader_stage;
--
GitLab
From 6482cce2d2895fed40631ad9f9256aa515cb5750 Mon Sep 17 00:00:00 2001
From 5c9dd4efece8f352d00d1310b556928cccb239c8 Mon Sep 17 00:00:00 2001
From: Konstantin Seurer <konstantin.seurer@gmail.com>
Date: Sat, 24 Jun 2023 16:11:16 +0200
Subject: [PATCH 4/4] radv/rt: Use monolithic pipelines
@ -645,7 +655,7 @@ Only available for non-recursive pipelines that do not have callables.
1 file changed, 11 insertions(+)
diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c
index 00bdd6244432..f1ef3d90cd1b 100644
index 12562c6cf89ba..97449b9cbafac 100644
--- a/src/amd/vulkan/radv_pipeline_rt.c
+++ b/src/amd/vulkan/radv_pipeline_rt.c
@@ -103,6 +103,17 @@ radv_generate_rt_pipeline_key(const struct radv_device *device, const struct rad