diff --git a/patches/0001-cachyos-base-all.patch b/patches/0001-cachyos-base-all.patch index cb5cb43..7485c5a 100644 --- a/patches/0001-cachyos-base-all.patch +++ b/patches/0001-cachyos-base-all.patch @@ -1,121 +1,68 @@ -From 5984a6b2cf95450f2f92610cfb69378b844da2a6 Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:51:09 +0800 -Subject: [PATCH 01/13] address-masking +From e3a84aa467e6f1e7f6c082e31c5840e97ae7a295 Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:17:26 +0100 +Subject: [PATCH 01/12] address-masking -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- - arch/x86/include/asm/uaccess_64.h | 11 +++++++++++ - fs/select.c | 4 +++- - include/linux/uaccess.h | 7 +++++++ - lib/strncpy_from_user.c | 9 +++++++++ - lib/strnlen_user.c | 9 +++++++++ - 5 files changed, 39 insertions(+), 1 deletion(-) + include/linux/uaccess.h | 21 +++++++++++++++------ + 1 file changed, 15 insertions(+), 6 deletions(-) -diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h -index 04789f45ab2b..afce8ee5d7b7 100644 ---- a/arch/x86/include/asm/uaccess_64.h -+++ b/arch/x86/include/asm/uaccess_64.h -@@ -53,6 +53,17 @@ static inline unsigned long __untagged_addr_remote(struct mm_struct *mm, - */ - #define valid_user_address(x) ((__force long)(x) >= 0) - -+/* -+ * Masking the user address is an alternative to a conditional -+ * user_access_begin that can avoid the fencing. This only works -+ * for dense accesses starting at the address. -+ */ -+#define mask_user_address(x) ((typeof(x))((long)(x)|((long)(x)>>63))) -+#define masked_user_access_begin(x) ({ \ -+ __auto_type __masked_ptr = (x); \ -+ __masked_ptr = mask_user_address(__masked_ptr); \ -+ __uaccess_begin(); __masked_ptr; }) -+ - /* - * User pointers can have tag bits on x86-64. This scheme tolerates - * arbitrary values in those bits rather then masking them off. -diff --git a/fs/select.c b/fs/select.c -index 9515c3fa1a03..bc185d111436 100644 ---- a/fs/select.c -+++ b/fs/select.c -@@ -780,7 +780,9 @@ static inline int get_sigset_argpack(struct sigset_argpack *to, - { - // the path is hot enough for overhead of copy_from_user() to matter - if (from) { -- if (!user_read_access_begin(from, sizeof(*from))) -+ if (can_do_masked_user_access()) -+ from = masked_user_access_begin(from); -+ else if (!user_read_access_begin(from, sizeof(*from))) - return -EFAULT; - unsafe_get_user(to->p, &from->p, Efault); - unsafe_get_user(to->size, &from->size, Efault); diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h -index d8e4105a2f21..39c7cf82b0c2 100644 +index 39c7cf82b0c2..43844510d5d0 100644 --- a/include/linux/uaccess.h +++ b/include/linux/uaccess.h -@@ -33,6 +33,13 @@ - }) +@@ -38,6 +38,7 @@ + #else + #define can_do_masked_user_access() 0 + #define masked_user_access_begin(src) NULL ++ #define mask_user_address(src) (src) #endif -+#ifdef masked_user_access_begin -+ #define can_do_masked_user_access() 1 -+#else -+ #define can_do_masked_user_access() 0 -+ #define masked_user_access_begin(src) NULL -+#endif -+ /* - * Architectures should provide two primitives (raw_copy_{to,from}_user()) - * and get rid of their private instances of copy_{to,from}_user() and -diff --git a/lib/strncpy_from_user.c b/lib/strncpy_from_user.c -index 6432b8c3e431..989a12a67872 100644 ---- a/lib/strncpy_from_user.c -+++ b/lib/strncpy_from_user.c -@@ -120,6 +120,15 @@ long strncpy_from_user(char *dst, const char __user *src, long count) - if (unlikely(count <= 0)) - return 0; - -+ if (can_do_masked_user_access()) { -+ long retval; -+ -+ src = masked_user_access_begin(src); -+ retval = do_strncpy_from_user(dst, src, count, count); -+ user_read_access_end(); -+ return retval; -+ } -+ - max_addr = TASK_SIZE_MAX; - src_addr = (unsigned long)untagged_addr(src); - if (likely(src_addr < max_addr)) { -diff --git a/lib/strnlen_user.c b/lib/strnlen_user.c -index feeb935a2299..6e489f9e90f1 100644 ---- a/lib/strnlen_user.c -+++ b/lib/strnlen_user.c -@@ -96,6 +96,15 @@ long strnlen_user(const char __user *str, long count) - if (unlikely(count <= 0)) - return 0; - -+ if (can_do_masked_user_access()) { -+ long retval; -+ -+ str = masked_user_access_begin(str); -+ retval = do_strnlen_user(str, count, count); -+ user_read_access_end(); -+ return retval; -+ } -+ - max_addr = TASK_SIZE_MAX; - src_addr = (unsigned long)untagged_addr(str); - if (likely(src_addr < max_addr)) { +@@ -159,19 +160,27 @@ _inline_copy_from_user(void *to, const void __user *from, unsigned long n) + { + unsigned long res = n; + might_fault(); +- if (!should_fail_usercopy() && likely(access_ok(from, n))) { ++ if (should_fail_usercopy()) ++ goto fail; ++ if (can_do_masked_user_access()) ++ from = mask_user_address(from); ++ else { ++ if (!access_ok(from, n)) ++ goto fail; + /* + * Ensure that bad access_ok() speculation will not + * lead to nasty side effects *after* the copy is + * finished: + */ + barrier_nospec(); +- instrument_copy_from_user_before(to, from, n); +- res = raw_copy_from_user(to, from, n); +- instrument_copy_from_user_after(to, from, n, res); + } +- if (unlikely(res)) +- memset(to + (n - res), 0, res); ++ instrument_copy_from_user_before(to, from, n); ++ res = raw_copy_from_user(to, from, n); ++ instrument_copy_from_user_after(to, from, n, res); ++ if (likely(!res)) ++ return 0; ++fail: ++ memset(to + (n - res), 0, res); + return res; + } + extern __must_check unsigned long -- -2.47.0.rc0 +2.47.0 -From bd40ee69b53e1cb291f96d3ad1120698aea8e96b Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:51:22 +0800 -Subject: [PATCH 02/13] amd-cache-optimizer +From 6fa826b951d38ade0a5b6a1f44e6f2d93f4f5941 Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:12:40 +0100 +Subject: [PATCH 02/12] amd-cache-optimizer -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- .../sysfs-bus-platform-drivers-amd_x3d_vcache | 14 ++ MAINTAINERS | 8 + @@ -401,12 +348,12 @@ index 000000000000..679613d02b9a +MODULE_DESCRIPTION("AMD 3D V-Cache Performance Optimizer Driver"); +MODULE_LICENSE("GPL"); -- -2.47.0.rc0 +2.47.0 -From f6f25468febfb80b968b50dabfb3f5656c4524e8 Mon Sep 17 00:00:00 2001 +From 22e62dc7c2fe659336c934f0f57556f65c60c085 Mon Sep 17 00:00:00 2001 From: Peter Jung -Date: Fri, 25 Oct 2024 18:38:55 +0200 -Subject: [PATCH 03/13] amd-pstate +Date: Fri, 1 Nov 2024 09:13:11 +0100 +Subject: [PATCH 03/12] amd-pstate Signed-off-by: Peter Jung --- @@ -415,7 +362,7 @@ Signed-off-by: Peter Jung arch/x86/include/asm/intel-family.h | 6 + arch/x86/include/asm/processor.h | 21 +- arch/x86/include/asm/topology.h | 9 + - arch/x86/kernel/acpi/cppc.c | 195 +++++++++++++- + arch/x86/kernel/acpi/cppc.c | 195 ++++++++++++++- arch/x86/kernel/cpu/amd.c | 16 -- arch/x86/kernel/cpu/debugfs.c | 1 + arch/x86/kernel/cpu/scattered.c | 3 +- @@ -423,10 +370,10 @@ Signed-off-by: Peter Jung arch/x86/kernel/cpu/topology_common.c | 34 +++ arch/x86/kernel/smpboot.c | 5 +- drivers/cpufreq/acpi-cpufreq.c | 12 +- - drivers/cpufreq/amd-pstate.c | 265 +++++++------------- + drivers/cpufreq/amd-pstate.c | 261 ++++++-------------- include/acpi/cppc_acpi.h | 41 ++- tools/arch/x86/include/asm/cpufeatures.h | 2 +- - 16 files changed, 401 insertions(+), 230 deletions(-) + 16 files changed, 394 insertions(+), 233 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index d0324d44f548..210a808b74ec 100644 @@ -974,7 +921,7 @@ index a8ca625a98b8..0f04feb6cafa 100644 nominal_perf = perf_caps.nominal_perf; diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c -index 589fde37ccd7..fb0a72ccff79 100644 +index 929b9097a6c1..0532e913705c 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -52,8 +52,6 @@ @@ -1380,29 +1327,7 @@ index 589fde37ccd7..fb0a72ccff79 100644 if (ret < 0) { dev_err(dev, "Failed to add min-freq constraint (%d)\n", ret); goto free_cpudata1; -@@ -1281,11 +1197,21 @@ static int amd_pstate_register_driver(int mode) - return -EINVAL; - - cppc_state = mode; -+ -+ ret = amd_pstate_enable(true); -+ if (ret) { -+ pr_err("failed to enable cppc during amd-pstate driver registration, return %d\n", -+ ret); -+ amd_pstate_driver_cleanup(); -+ return ret; -+ } -+ - ret = cpufreq_register_driver(current_pstate_driver); - if (ret) { - amd_pstate_driver_cleanup(); - return ret; - } -+ - return 0; - } - -@@ -1496,12 +1422,12 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) +@@ -1506,12 +1422,12 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) cpudata->cpu = policy->cpu; cpudata->epp_policy = 0; @@ -1417,7 +1342,7 @@ index 589fde37ccd7..fb0a72ccff79 100644 ret = amd_pstate_init_freq(cpudata); if (ret) goto free_cpudata1; -@@ -1571,23 +1497,13 @@ static void amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy) +@@ -1581,23 +1497,13 @@ static void amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy) static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy) { struct amd_cpudata *cpudata = policy->driver_data; @@ -1443,7 +1368,16 @@ index 589fde37ccd7..fb0a72ccff79 100644 max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf, cpudata->max_limit_perf); -@@ -1624,12 +1540,6 @@ static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy) +@@ -1606,7 +1512,7 @@ static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy) + value = READ_ONCE(cpudata->cppc_req_cached); + + if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) +- min_perf = max_perf; ++ min_perf = min(cpudata->nominal_perf, max_perf); + + /* Initial min/max values for CPPC Performance Controls Register */ + value &= ~AMD_CPPC_MIN_PERF(~0L); +@@ -1634,12 +1540,6 @@ static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy) if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) epp = 0; @@ -1456,7 +1390,7 @@ index 589fde37ccd7..fb0a72ccff79 100644 WRITE_ONCE(cpudata->cppc_req_cached, value); amd_pstate_set_epp(cpudata, epp); } -@@ -1737,13 +1647,6 @@ static int amd_pstate_epp_cpu_offline(struct cpufreq_policy *policy) +@@ -1747,13 +1647,6 @@ static int amd_pstate_epp_cpu_offline(struct cpufreq_policy *policy) return 0; } @@ -1470,7 +1404,7 @@ index 589fde37ccd7..fb0a72ccff79 100644 static int amd_pstate_epp_suspend(struct cpufreq_policy *policy) { struct amd_cpudata *cpudata = policy->driver_data; -@@ -1799,7 +1702,7 @@ static struct cpufreq_driver amd_pstate_driver = { +@@ -1809,7 +1702,7 @@ static struct cpufreq_driver amd_pstate_driver = { static struct cpufreq_driver amd_pstate_epp_driver = { .flags = CPUFREQ_CONST_LOOPS, @@ -1479,7 +1413,7 @@ index 589fde37ccd7..fb0a72ccff79 100644 .setpolicy = amd_pstate_epp_set_policy, .init = amd_pstate_epp_cpu_init, .exit = amd_pstate_epp_cpu_exit, -@@ -1832,7 +1735,7 @@ static int __init amd_pstate_set_driver(int mode_idx) +@@ -1842,7 +1735,7 @@ static int __init amd_pstate_set_driver(int mode_idx) return -EINVAL; } @@ -1488,7 +1422,20 @@ index 589fde37ccd7..fb0a72ccff79 100644 * CPPC function is not supported for family ID 17H with model_ID ranging from 0x10 to 0x2F. * show the debug message that helps to check if the CPU has CPPC support for loading issue. */ -@@ -1955,9 +1858,15 @@ static int __init amd_pstate_init(void) +@@ -1932,10 +1825,10 @@ static int __init amd_pstate_init(void) + if (cppc_state == AMD_PSTATE_UNDEFINED) { + /* Disable on the following configs by default: + * 1. Undefined platforms +- * 2. Server platforms ++ * 2. Server platforms with CPUs older than Family 0x1A. + */ + if (amd_pstate_acpi_pm_profile_undefined() || +- amd_pstate_acpi_pm_profile_server()) { ++ (amd_pstate_acpi_pm_profile_server() && boot_cpu_data.x86 < 0x1A)) { + pr_info("driver load is disabled, boot with specific mode to enable this\n"); + return -ENODEV; + } +@@ -1965,9 +1858,15 @@ static int __init amd_pstate_init(void) current_pstate_driver->adjust_perf = amd_pstate_adjust_perf; } else { pr_debug("AMD CPPC shared memory based functionality is supported\n"); @@ -1616,14 +1563,14 @@ index dd4682857c12..23698d0f4bb4 100644 /* * BUG word(s) -- -2.47.0.rc0 +2.47.0 -From f3e882f80066e4cfda6767e245e95ca280db8bc0 Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:52:00 +0800 -Subject: [PATCH 04/13] bbr3 +From 234fb5cdb099e93cc6c8882b5165ddb78beeef29 Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:13:22 +0100 +Subject: [PATCH 04/12] bbr3 -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- include/linux/tcp.h | 4 +- include/net/inet_connection_sock.h | 4 +- @@ -5002,24 +4949,23 @@ index 4d40615dc8fc..f27941201ef2 100644 event = icsk->icsk_pending; -- -2.47.0.rc0 +2.47.0 -From 2a2f186f1c8c99bdd1183fd28527bf95f781166c Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:52:15 +0800 -Subject: [PATCH 05/13] cachy +From c3d18557f4f71abdc434c928fd22d75e74ee781b Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:14:43 +0100 +Subject: [PATCH 05/12] cachy -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- .../admin-guide/kernel-parameters.txt | 12 + Makefile | 8 + arch/x86/Kconfig.cpu | 359 +- - arch/x86/Makefile | 91 +- + arch/x86/Makefile | 87 +- arch/x86/include/asm/pci.h | 6 + arch/x86/include/asm/vermagic.h | 70 + arch/x86/pci/common.c | 7 +- block/bfq-iosched.c | 6 + - block/elevator.c | 10 + drivers/Makefile | 13 +- drivers/ata/ahci.c | 23 +- drivers/cpufreq/Kconfig.x86 | 2 - @@ -5034,10 +4980,6 @@ Signed-off-by: Eric Naim .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 6 +- drivers/gpu/drm/amd/pm/amdgpu_pm.c | 3 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 14 +- - drivers/i2c/busses/Kconfig | 9 + - drivers/i2c/busses/Makefile | 1 + - drivers/i2c/busses/i2c-nct6775.c | 648 ++++ - drivers/i2c/busses/i2c-piix4.c | 4 +- drivers/input/evdev.c | 19 +- drivers/md/dm-crypt.c | 5 + drivers/media/v4l2-core/Kconfig | 5 + @@ -5063,7 +5005,6 @@ Signed-off-by: Eric Naim kernel/user_namespace.c | 7 + mm/Kconfig | 2 +- mm/compaction.c | 4 + - mm/huge_memory.c | 4 + mm/page-writeback.c | 8 + mm/page_alloc.c | 4 + mm/swap.c | 5 + @@ -5072,8 +5013,7 @@ Signed-off-by: Eric Naim net/ipv4/inet_connection_sock.c | 2 +- scripts/Makefile.package | 3 +- scripts/package/PKGBUILD | 52 +- - 61 files changed, 5798 insertions(+), 113 deletions(-) - create mode 100644 drivers/i2c/busses/i2c-nct6775.c + 55 files changed, 5122 insertions(+), 109 deletions(-) create mode 100644 drivers/media/v4l2-core/v4l2loopback.c create mode 100644 drivers/media/v4l2-core/v4l2loopback.h create mode 100644 drivers/media/v4l2-core/v4l2loopback_formats.h @@ -5110,7 +5050,7 @@ index be010fec7654..900113802ffc 100644 Safety option to keep boot IRQs enabled. This should never be necessary. diff --git a/Makefile b/Makefile -index 687ce7aee67a..7c3cbfb2f6b5 100644 +index 318a5d60088e..1c1773ba7867 100644 --- a/Makefile +++ b/Makefile @@ -803,11 +803,19 @@ KBUILD_CFLAGS += -fno-delete-null-pointer-checks @@ -5572,21 +5512,9 @@ index 2a7279d80460..f5849153b385 100644 # # P6_NOPs are a relatively minor optimization that require a family >= diff --git a/arch/x86/Makefile b/arch/x86/Makefile -index 801fd85c3ef6..85d962aa68fe 100644 +index 801fd85c3ef6..db8fcb971401 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile -@@ -70,9 +70,9 @@ export BITS - # - # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53383 - # --KBUILD_CFLAGS += -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -+KBUILD_CFLAGS += -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -mno-avx2 -mno-avx512f -fno-tree-vectorize - KBUILD_RUSTFLAGS += --target=$(objtree)/scripts/target.json --KBUILD_RUSTFLAGS += -Ctarget-feature=-sse,-sse2,-sse3,-ssse3,-sse4.1,-sse4.2,-avx,-avx2 -+KBUILD_RUSTFLAGS += -Ctarget-feature=-sse,-sse2,-sse3,-ssse3,-sse4.1,-sse4.2,-avx,-avx2,-avx512f - - # - # CFLAGS for compiling floating point code inside the kernel. @@ -177,15 +177,96 @@ else cflags-$(CONFIG_MK8) += -march=k8 cflags-$(CONFIG_MPSC) += -march=nocona @@ -5845,30 +5773,6 @@ index 1cc40a857fb8..c446fa6a6ad1 100644 return 0; slab_kill: -diff --git a/block/elevator.c b/block/elevator.c -index 4122026b11f1..cd630e991eae 100644 ---- a/block/elevator.c -+++ b/block/elevator.c -@@ -567,9 +567,19 @@ static struct elevator_type *elevator_get_default(struct request_queue *q) - - if (q->nr_hw_queues != 1 && - !blk_mq_is_shared_tags(q->tag_set->flags)) -+#if defined(CONFIG_CACHY) && defined(CONFIG_MQ_IOSCHED_KYBER) -+ return elevator_find_get(q, "kyber"); -+#elif defined(CONFIG_CACHY) -+ return elevator_find_get(q, "mq-deadline"); -+#else - return NULL; -+#endif - -+#if defined(CONFIG_CACHY) && defined(CONFIG_IOSCHED_BFQ) -+ return elevator_find_get(q, "bfq"); -+#else - return elevator_find_get(q, "mq-deadline"); -+#endif - } - - /* diff --git a/drivers/Makefile b/drivers/Makefile index fe9ceb0d2288..b58955caf19b 100644 --- a/drivers/Makefile @@ -6219,710 +6123,6 @@ index 87672ca714de..21442469791c 100644 dev_err(smu->adev->dev, "New power limit (%d) is out of range [%d,%d]\n", limit, smu->min_power_limit, smu->max_power_limit); -diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig -index a22f9125322a..44d863e0175e 100644 ---- a/drivers/i2c/busses/Kconfig -+++ b/drivers/i2c/busses/Kconfig -@@ -240,6 +240,15 @@ config I2C_CHT_WC - combined with a FUSB302 Type-C port-controller as such it is advised - to also select CONFIG_TYPEC_FUSB302=m. - -+config I2C_NCT6775 -+ tristate "Nuvoton NCT6775 and compatible SMBus controller" -+ help -+ If you say yes to this option, support will be included for the -+ Nuvoton NCT6775 and compatible SMBus controllers. -+ -+ This driver can also be built as a module. If so, the module -+ will be called i2c-nct6775. -+ - config I2C_NFORCE2 - tristate "Nvidia nForce2, nForce3 and nForce4" - depends on PCI && HAS_IOPORT -diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile -index 78d0561339e5..9ea3a294f9f0 100644 ---- a/drivers/i2c/busses/Makefile -+++ b/drivers/i2c/busses/Makefile -@@ -20,6 +20,7 @@ obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o - obj-$(CONFIG_I2C_I801) += i2c-i801.o - obj-$(CONFIG_I2C_ISCH) += i2c-isch.o - obj-$(CONFIG_I2C_ISMT) += i2c-ismt.o -+obj-$(CONFIG_I2C_NCT6775) += i2c-nct6775.o - obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o - obj-$(CONFIG_I2C_NFORCE2_S4985) += i2c-nforce2-s4985.o - obj-$(CONFIG_I2C_NVIDIA_GPU) += i2c-nvidia-gpu.o -diff --git a/drivers/i2c/busses/i2c-nct6775.c b/drivers/i2c/busses/i2c-nct6775.c -new file mode 100644 -index 000000000000..fdbd9a1c8d7a ---- /dev/null -+++ b/drivers/i2c/busses/i2c-nct6775.c -@@ -0,0 +1,648 @@ -+/* -+ * i2c-nct6775 - Driver for the SMBus master functionality of -+ * Nuvoton NCT677x Super-I/O chips -+ * -+ * Copyright (C) 2019 Adam Honse -+ * -+ * Derived from nct6775 hwmon driver -+ * Copyright (C) 2012 Guenter Roeck -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRVNAME "i2c-nct6775" -+ -+/* Nuvoton SMBus address offsets */ -+#define SMBHSTDAT (0 + nuvoton_nct6793d_smba) -+#define SMBBLKSZ (1 + nuvoton_nct6793d_smba) -+#define SMBHSTCMD (2 + nuvoton_nct6793d_smba) -+#define SMBHSTIDX (3 + nuvoton_nct6793d_smba) //Index field is the Command field on other controllers -+#define SMBHSTCTL (4 + nuvoton_nct6793d_smba) -+#define SMBHSTADD (5 + nuvoton_nct6793d_smba) -+#define SMBHSTERR (9 + nuvoton_nct6793d_smba) -+#define SMBHSTSTS (0xE + nuvoton_nct6793d_smba) -+ -+/* Command register */ -+#define NCT6793D_READ_BYTE 0 -+#define NCT6793D_READ_WORD 1 -+#define NCT6793D_READ_BLOCK 2 -+#define NCT6793D_BLOCK_WRITE_READ_PROC_CALL 3 -+#define NCT6793D_PROC_CALL 4 -+#define NCT6793D_WRITE_BYTE 8 -+#define NCT6793D_WRITE_WORD 9 -+#define NCT6793D_WRITE_BLOCK 10 -+ -+/* Control register */ -+#define NCT6793D_MANUAL_START 128 -+#define NCT6793D_SOFT_RESET 64 -+ -+/* Error register */ -+#define NCT6793D_NO_ACK 32 -+ -+/* Status register */ -+#define NCT6793D_FIFO_EMPTY 1 -+#define NCT6793D_FIFO_FULL 2 -+#define NCT6793D_MANUAL_ACTIVE 4 -+ -+#define NCT6775_LD_SMBUS 0x0B -+ -+/* Other settings */ -+#define MAX_RETRIES 400 -+ -+enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793, -+ nct6795, nct6796, nct6798 }; -+ -+struct nct6775_sio_data { -+ int sioreg; -+ enum kinds kind; -+}; -+ -+/* used to set data->name = nct6775_device_names[data->sio_kind] */ -+static const char * const nct6775_device_names[] = { -+ "nct6106", -+ "nct6775", -+ "nct6776", -+ "nct6779", -+ "nct6791", -+ "nct6792", -+ "nct6793", -+ "nct6795", -+ "nct6796", -+ "nct6798", -+}; -+ -+static const char * const nct6775_sio_names[] __initconst = { -+ "NCT6106D", -+ "NCT6775F", -+ "NCT6776D/F", -+ "NCT6779D", -+ "NCT6791D", -+ "NCT6792D", -+ "NCT6793D", -+ "NCT6795D", -+ "NCT6796D", -+ "NCT6798D", -+}; -+ -+#define SIO_REG_LDSEL 0x07 /* Logical device select */ -+#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ -+#define SIO_REG_SMBA 0x62 /* SMBus base address register */ -+ -+#define SIO_NCT6106_ID 0xc450 -+#define SIO_NCT6775_ID 0xb470 -+#define SIO_NCT6776_ID 0xc330 -+#define SIO_NCT6779_ID 0xc560 -+#define SIO_NCT6791_ID 0xc800 -+#define SIO_NCT6792_ID 0xc910 -+#define SIO_NCT6793_ID 0xd120 -+#define SIO_NCT6795_ID 0xd350 -+#define SIO_NCT6796_ID 0xd420 -+#define SIO_NCT6798_ID 0xd428 -+#define SIO_ID_MASK 0xFFF0 -+ -+static inline void -+superio_outb(int ioreg, int reg, int val) -+{ -+ outb(reg, ioreg); -+ outb(val, ioreg + 1); -+} -+ -+static inline int -+superio_inb(int ioreg, int reg) -+{ -+ outb(reg, ioreg); -+ return inb(ioreg + 1); -+} -+ -+static inline void -+superio_select(int ioreg, int ld) -+{ -+ outb(SIO_REG_LDSEL, ioreg); -+ outb(ld, ioreg + 1); -+} -+ -+static inline int -+superio_enter(int ioreg) -+{ -+ /* -+ * Try to reserve and for exclusive access. -+ */ -+ if (!request_muxed_region(ioreg, 2, DRVNAME)) -+ return -EBUSY; -+ -+ outb(0x87, ioreg); -+ outb(0x87, ioreg); -+ -+ return 0; -+} -+ -+static inline void -+superio_exit(int ioreg) -+{ -+ outb(0xaa, ioreg); -+ outb(0x02, ioreg); -+ outb(0x02, ioreg + 1); -+ release_region(ioreg, 2); -+} -+ -+/* -+ * ISA constants -+ */ -+ -+#define IOREGION_ALIGNMENT (~7) -+#define IOREGION_LENGTH 2 -+#define ADDR_REG_OFFSET 0 -+#define DATA_REG_OFFSET 1 -+ -+#define NCT6775_REG_BANK 0x4E -+#define NCT6775_REG_CONFIG 0x40 -+ -+static struct i2c_adapter *nct6775_adapter; -+ -+struct i2c_nct6775_adapdata { -+ unsigned short smba; -+}; -+ -+/* Return negative errno on error. */ -+static s32 nct6775_access(struct i2c_adapter * adap, u16 addr, -+ unsigned short flags, char read_write, -+ u8 command, int size, union i2c_smbus_data * data) -+{ -+ struct i2c_nct6775_adapdata *adapdata = i2c_get_adapdata(adap); -+ unsigned short nuvoton_nct6793d_smba = adapdata->smba; -+ int i, len, cnt; -+ union i2c_smbus_data tmp_data; -+ int timeout = 0; -+ -+ tmp_data.word = 0; -+ cnt = 0; -+ len = 0; -+ -+ outb_p(NCT6793D_SOFT_RESET, SMBHSTCTL); -+ -+ switch (size) { -+ case I2C_SMBUS_QUICK: -+ outb_p((addr << 1) | read_write, -+ SMBHSTADD); -+ break; -+ case I2C_SMBUS_BYTE_DATA: -+ tmp_data.byte = data->byte; -+ fallthrough; -+ case I2C_SMBUS_BYTE: -+ outb_p((addr << 1) | read_write, -+ SMBHSTADD); -+ outb_p(command, SMBHSTIDX); -+ if (read_write == I2C_SMBUS_WRITE) { -+ outb_p(tmp_data.byte, SMBHSTDAT); -+ outb_p(NCT6793D_WRITE_BYTE, SMBHSTCMD); -+ } -+ else { -+ outb_p(NCT6793D_READ_BYTE, SMBHSTCMD); -+ } -+ break; -+ case I2C_SMBUS_WORD_DATA: -+ outb_p((addr << 1) | read_write, -+ SMBHSTADD); -+ outb_p(command, SMBHSTIDX); -+ if (read_write == I2C_SMBUS_WRITE) { -+ outb_p(data->word & 0xff, SMBHSTDAT); -+ outb_p((data->word & 0xff00) >> 8, SMBHSTDAT); -+ outb_p(NCT6793D_WRITE_WORD, SMBHSTCMD); -+ } -+ else { -+ outb_p(NCT6793D_READ_WORD, SMBHSTCMD); -+ } -+ break; -+ case I2C_SMBUS_BLOCK_DATA: -+ outb_p((addr << 1) | read_write, -+ SMBHSTADD); -+ outb_p(command, SMBHSTIDX); -+ if (read_write == I2C_SMBUS_WRITE) { -+ len = data->block[0]; -+ if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) -+ return -EINVAL; -+ outb_p(len, SMBBLKSZ); -+ -+ cnt = 1; -+ if (len >= 4) { -+ for (i = cnt; i <= 4; i++) { -+ outb_p(data->block[i], SMBHSTDAT); -+ } -+ -+ len -= 4; -+ cnt += 4; -+ } -+ else { -+ for (i = cnt; i <= len; i++ ) { -+ outb_p(data->block[i], SMBHSTDAT); -+ } -+ -+ len = 0; -+ } -+ -+ outb_p(NCT6793D_WRITE_BLOCK, SMBHSTCMD); -+ } -+ else { -+ return -ENOTSUPP; -+ } -+ break; -+ default: -+ dev_warn(&adap->dev, "Unsupported transaction %d\n", size); -+ return -EOPNOTSUPP; -+ } -+ -+ outb_p(NCT6793D_MANUAL_START, SMBHSTCTL); -+ -+ while ((size == I2C_SMBUS_BLOCK_DATA) && (len > 0)) { -+ if (read_write == I2C_SMBUS_WRITE) { -+ timeout = 0; -+ while ((inb_p(SMBHSTSTS) & NCT6793D_FIFO_EMPTY) == 0) -+ { -+ if(timeout > MAX_RETRIES) -+ { -+ return -ETIMEDOUT; -+ } -+ usleep_range(250, 500); -+ timeout++; -+ } -+ -+ //Load more bytes into FIFO -+ if (len >= 4) { -+ for (i = cnt; i <= (cnt + 4); i++) { -+ outb_p(data->block[i], SMBHSTDAT); -+ } -+ -+ len -= 4; -+ cnt += 4; -+ } -+ else { -+ for (i = cnt; i <= (cnt + len); i++) { -+ outb_p(data->block[i], SMBHSTDAT); -+ } -+ -+ len = 0; -+ } -+ } -+ else { -+ return -ENOTSUPP; -+ } -+ -+ } -+ -+ //wait for manual mode to complete -+ timeout = 0; -+ while ((inb_p(SMBHSTSTS) & NCT6793D_MANUAL_ACTIVE) != 0) -+ { -+ if(timeout > MAX_RETRIES) -+ { -+ return -ETIMEDOUT; -+ } -+ usleep_range(250, 500); -+ timeout++; -+ } -+ -+ if ((inb_p(SMBHSTERR) & NCT6793D_NO_ACK) != 0) { -+ return -ENXIO; -+ } -+ else if ((read_write == I2C_SMBUS_WRITE) || (size == I2C_SMBUS_QUICK)) { -+ return 0; -+ } -+ -+ switch (size) { -+ case I2C_SMBUS_QUICK: -+ case I2C_SMBUS_BYTE_DATA: -+ data->byte = inb_p(SMBHSTDAT); -+ break; -+ case I2C_SMBUS_WORD_DATA: -+ data->word = inb_p(SMBHSTDAT) + (inb_p(SMBHSTDAT) << 8); -+ break; -+ } -+ return 0; -+} -+ -+static u32 nct6775_func(struct i2c_adapter *adapter) -+{ -+ return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | -+ I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | -+ I2C_FUNC_SMBUS_BLOCK_DATA; -+} -+ -+static const struct i2c_algorithm smbus_algorithm = { -+ .smbus_xfer = nct6775_access, -+ .functionality = nct6775_func, -+}; -+ -+static int nct6775_add_adapter(unsigned short smba, const char *name, struct i2c_adapter **padap) -+{ -+ struct i2c_adapter *adap; -+ struct i2c_nct6775_adapdata *adapdata; -+ int retval; -+ -+ adap = kzalloc(sizeof(*adap), GFP_KERNEL); -+ if (adap == NULL) { -+ return -ENOMEM; -+ } -+ -+ adap->owner = THIS_MODULE; -+ adap->class = I2C_CLASS_HWMON; -+ adap->algo = &smbus_algorithm; -+ -+ adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL); -+ if (adapdata == NULL) { -+ kfree(adap); -+ return -ENOMEM; -+ } -+ -+ adapdata->smba = smba; -+ -+ snprintf(adap->name, sizeof(adap->name), -+ "SMBus NCT67xx adapter%s at %04x", name, smba); -+ -+ i2c_set_adapdata(adap, adapdata); -+ -+ retval = i2c_add_adapter(adap); -+ if (retval) { -+ kfree(adapdata); -+ kfree(adap); -+ return retval; -+ } -+ -+ *padap = adap; -+ return 0; -+} -+ -+static void nct6775_remove_adapter(struct i2c_adapter *adap) -+{ -+ struct i2c_nct6775_adapdata *adapdata = i2c_get_adapdata(adap); -+ -+ if (adapdata->smba) { -+ i2c_del_adapter(adap); -+ kfree(adapdata); -+ kfree(adap); -+ } -+} -+ -+//static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume); -+ -+/* -+ * when Super-I/O functions move to a separate file, the Super-I/O -+ * bus will manage the lifetime of the device and this module will only keep -+ * track of the nct6775 driver. But since we use platform_device_alloc(), we -+ * must keep track of the device -+ */ -+static struct platform_device *pdev[2]; -+ -+static int nct6775_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct nct6775_sio_data *sio_data = dev_get_platdata(dev); -+ struct resource *res; -+ -+ res = platform_get_resource(pdev, IORESOURCE_IO, 0); -+ if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH, -+ DRVNAME)) -+ return -EBUSY; -+ -+ switch (sio_data->kind) { -+ case nct6791: -+ case nct6792: -+ case nct6793: -+ case nct6795: -+ case nct6796: -+ case nct6798: -+ nct6775_add_adapter(res->start, "", &nct6775_adapter); -+ break; -+ default: -+ return -ENODEV; -+ } -+ -+ return 0; -+} -+/* -+static void nct6791_enable_io_mapping(int sioaddr) -+{ -+ int val; -+ -+ val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE); -+ if (val & 0x10) { -+ pr_info("Enabling hardware monitor logical device mappings.\n"); -+ superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE, -+ val & ~0x10); -+ } -+}*/ -+ -+static struct platform_driver i2c_nct6775_driver = { -+ .driver = { -+ .name = DRVNAME, -+// .pm = &nct6775_dev_pm_ops, -+ }, -+ .probe = nct6775_probe, -+}; -+ -+static void __exit i2c_nct6775_exit(void) -+{ -+ int i; -+ -+ if(nct6775_adapter) -+ nct6775_remove_adapter(nct6775_adapter); -+ -+ for (i = 0; i < ARRAY_SIZE(pdev); i++) { -+ if (pdev[i]) -+ platform_device_unregister(pdev[i]); -+ } -+ platform_driver_unregister(&i2c_nct6775_driver); -+} -+ -+/* nct6775_find() looks for a '627 in the Super-I/O config space */ -+static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data) -+{ -+ u16 val; -+ int err; -+ int addr; -+ -+ err = superio_enter(sioaddr); -+ if (err) -+ return err; -+ -+ val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) | -+ superio_inb(sioaddr, SIO_REG_DEVID + 1); -+ -+ switch (val & SIO_ID_MASK) { -+ case SIO_NCT6106_ID: -+ sio_data->kind = nct6106; -+ break; -+ case SIO_NCT6775_ID: -+ sio_data->kind = nct6775; -+ break; -+ case SIO_NCT6776_ID: -+ sio_data->kind = nct6776; -+ break; -+ case SIO_NCT6779_ID: -+ sio_data->kind = nct6779; -+ break; -+ case SIO_NCT6791_ID: -+ sio_data->kind = nct6791; -+ break; -+ case SIO_NCT6792_ID: -+ sio_data->kind = nct6792; -+ break; -+ case SIO_NCT6793_ID: -+ sio_data->kind = nct6793; -+ break; -+ case SIO_NCT6795_ID: -+ sio_data->kind = nct6795; -+ break; -+ case SIO_NCT6796_ID: -+ sio_data->kind = nct6796; -+ break; -+ case SIO_NCT6798_ID: -+ sio_data->kind = nct6798; -+ break; -+ default: -+ if (val != 0xffff) -+ pr_debug("unsupported chip ID: 0x%04x\n", val); -+ superio_exit(sioaddr); -+ return -ENODEV; -+ } -+ -+ /* We have a known chip, find the SMBus I/O address */ -+ superio_select(sioaddr, NCT6775_LD_SMBUS); -+ val = (superio_inb(sioaddr, SIO_REG_SMBA) << 8) -+ | superio_inb(sioaddr, SIO_REG_SMBA + 1); -+ addr = val & IOREGION_ALIGNMENT; -+ if (addr == 0) { -+ pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n"); -+ superio_exit(sioaddr); -+ return -ENODEV; -+ } -+ -+ //if (sio_data->kind == nct6791 || sio_data->kind == nct6792 || -+ // sio_data->kind == nct6793 || sio_data->kind == nct6795 || -+ // sio_data->kind == nct6796) -+ // nct6791_enable_io_mapping(sioaddr); -+ -+ superio_exit(sioaddr); -+ pr_info("Found %s or compatible chip at %#x:%#x\n", -+ nct6775_sio_names[sio_data->kind], sioaddr, addr); -+ sio_data->sioreg = sioaddr; -+ -+ return addr; -+} -+ -+static int __init i2c_nct6775_init(void) -+{ -+ int i, err; -+ bool found = false; -+ int address; -+ struct resource res; -+ struct nct6775_sio_data sio_data; -+ int sioaddr[2] = { 0x2e, 0x4e }; -+ -+ err = platform_driver_register(&i2c_nct6775_driver); -+ if (err) -+ return err; -+ -+ /* -+ * initialize sio_data->kind and sio_data->sioreg. -+ * -+ * when Super-I/O functions move to a separate file, the Super-I/O -+ * driver will probe 0x2e and 0x4e and auto-detect the presence of a -+ * nct6775 hardware monitor, and call probe() -+ */ -+ for (i = 0; i < ARRAY_SIZE(pdev); i++) { -+ address = nct6775_find(sioaddr[i], &sio_data); -+ if (address <= 0) -+ continue; -+ -+ found = true; -+ -+ pdev[i] = platform_device_alloc(DRVNAME, address); -+ if (!pdev[i]) { -+ err = -ENOMEM; -+ goto exit_device_unregister; -+ } -+ -+ err = platform_device_add_data(pdev[i], &sio_data, -+ sizeof(struct nct6775_sio_data)); -+ if (err) -+ goto exit_device_put; -+ -+ memset(&res, 0, sizeof(res)); -+ res.name = DRVNAME; -+ res.start = address; -+ res.end = address + IOREGION_LENGTH - 1; -+ res.flags = IORESOURCE_IO; -+ -+ err = acpi_check_resource_conflict(&res); -+ if (err) { -+ platform_device_put(pdev[i]); -+ pdev[i] = NULL; -+ continue; -+ } -+ -+ err = platform_device_add_resources(pdev[i], &res, 1); -+ if (err) -+ goto exit_device_put; -+ -+ /* platform_device_add calls probe() */ -+ err = platform_device_add(pdev[i]); -+ if (err) -+ goto exit_device_put; -+ } -+ if (!found) { -+ err = -ENODEV; -+ goto exit_unregister; -+ } -+ -+ return 0; -+ -+exit_device_put: -+ platform_device_put(pdev[i]); -+exit_device_unregister: -+ while (--i >= 0) { -+ if (pdev[i]) -+ platform_device_unregister(pdev[i]); -+ } -+exit_unregister: -+ platform_driver_unregister(&i2c_nct6775_driver); -+ return err; -+} -+ -+MODULE_AUTHOR("Adam Honse "); -+MODULE_DESCRIPTION("SMBus driver for NCT6775F and compatible chips"); -+MODULE_LICENSE("GPL"); -+ -+module_init(i2c_nct6775_init); -+module_exit(i2c_nct6775_exit); -diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c -index 4e32d57ae0bf..a2deb7379904 100644 ---- a/drivers/i2c/busses/i2c-piix4.c -+++ b/drivers/i2c/busses/i2c-piix4.c -@@ -569,11 +569,11 @@ static int piix4_transaction(struct i2c_adapter *piix4_adapter) - if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */ - usleep_range(2000, 2100); - else -- usleep_range(250, 500); -+ usleep_range(25, 50); - - while ((++timeout < MAX_TIMEOUT) && - ((temp = inb_p(SMBHSTSTS)) & 0x01)) -- usleep_range(250, 500); -+ usleep_range(25, 50); - - /* If the SMBus is still busy, we give up */ - if (timeout == MAX_TIMEOUT) { diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c index a8ce3d140722..49729cf8c12f 100644 --- a/drivers/input/evdev.c @@ -11773,22 +10973,6 @@ index eb95e9b435d0..ae03cdc3e76e 100644 static int sysctl_extfrag_threshold = 500; static int __read_mostly sysctl_compact_memory; -diff --git a/mm/huge_memory.c b/mm/huge_memory.c -index 99b146d16a18..4d2839fcf688 100644 ---- a/mm/huge_memory.c -+++ b/mm/huge_memory.c -@@ -64,7 +64,11 @@ unsigned long transparent_hugepage_flags __read_mostly = - #ifdef CONFIG_TRANSPARENT_HUGEPAGE_MADVISE - (1< -Date: Tue, 22 Oct 2024 22:52:25 +0800 -Subject: [PATCH 06/13] fixes +From d9c17d5d901674319171a09d1f01a6df1e57f195 Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:14:54 +0100 +Subject: [PATCH 06/12] fixes -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- - arch/Kconfig | 4 +- - drivers/bluetooth/btusb.c | 4 ++ - drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 ++ - drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 +++- - drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 3 +- - drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h | 2 +- - drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h | 2 +- - drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 2 +- - drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h | 2 +- - .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +- - .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +- - .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 25 +++++++--- - .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 19 ++++---- - .../gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 14 +++--- - .../gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c | 2 +- - .../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 15 +++--- - .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 34 +++++++++---- - .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 3 +- - .../drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c | 22 +++++---- - .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 15 +++--- - .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 +- - .../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 36 ++++++++------ - .../gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c | 33 +++++++++---- - .../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 3 +- - drivers/gpu/drm/drm_edid.c | 47 ++++++++++++++++-- - drivers/net/wireless/realtek/rtw89/pci.c | 48 ++++++++++++++++--- - drivers/platform/x86/dell/dell-wmi-base.c | 9 ++++ - mm/mmap.c | 4 -- - mm/shrinker.c | 4 +- - net/netfilter/xt_NFLOG.c | 2 +- - net/netfilter/xt_TRACE.c | 1 + - net/netfilter/xt_mark.c | 2 +- - 32 files changed, 269 insertions(+), 110 deletions(-) + arch/Kconfig | 4 +- + drivers/bluetooth/btusb.c | 4 ++ + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +++ + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 15 ++++++- + drivers/gpu/drm/drm_edid.c | 47 ++++++++++++++++++++-- + drivers/net/wireless/realtek/rtw89/pci.c | 48 +++++++++++++++++++---- + mm/mmap.c | 3 +- + mm/shrinker.c | 8 ++-- + 8 files changed, 117 insertions(+), 17 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 975dd22a2dbd..de69b8f5b5be 100644 @@ -12127,20 +11287,25 @@ index 9c3b7b027485..ad5c05ee92f3 100644 return pci_register_driver(&amdgpu_kms_pci_driver); diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c -index 21442469791c..18eaab929540 100644 +index 21442469791c..51dea35848f6 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c -@@ -140,7 +140,8 @@ int smu_set_soft_freq_range(struct smu_context *smu, - ret = smu->ppt_funcs->set_soft_freq_limited_range(smu, - clk_type, - min, -- max); -+ max, -+ false); - - return ret; +@@ -1234,6 +1234,14 @@ static void smu_init_xgmi_plpd_mode(struct smu_context *smu) + } } -@@ -1257,7 +1258,6 @@ static int smu_sw_init(void *handle) + ++static bool smu_is_workload_profile_available(struct smu_context *smu, ++ u32 profile) ++{ ++ if (profile >= PP_SMC_POWER_PROFILE_COUNT) ++ return false; ++ return smu->workload_map && smu->workload_map[profile].valid_mapping; ++} ++ + static int smu_sw_init(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; +@@ -1257,7 +1265,6 @@ static int smu_sw_init(void *handle) atomic_set(&smu->smu_power.power_gate.vpe_gated, 1); atomic_set(&smu->smu_power.power_gate.umsch_mm_gated, 1); @@ -12148,12 +11313,12 @@ index 21442469791c..18eaab929540 100644 smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0; smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D] = 1; smu->workload_prority[PP_SMC_POWER_PROFILE_POWERSAVING] = 2; -@@ -1266,6 +1266,12 @@ static int smu_sw_init(void *handle) +@@ -1266,6 +1273,12 @@ static int smu_sw_init(void *handle) smu->workload_prority[PP_SMC_POWER_PROFILE_COMPUTE] = 5; smu->workload_prority[PP_SMC_POWER_PROFILE_CUSTOM] = 6; + if (smu->is_apu || -+ (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 1))) ++ !smu_is_workload_profile_available(smu, PP_SMC_POWER_PROFILE_FULLSCREEN3D)) + smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT]; + else + smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D]; @@ -12161,879 +11326,6 @@ index 21442469791c..18eaab929540 100644 smu->workload_setting[0] = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; smu->workload_setting[1] = PP_SMC_POWER_PROFILE_FULLSCREEN3D; smu->workload_setting[2] = PP_SMC_POWER_PROFILE_POWERSAVING; -diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h -index b44a185d07e8..5eb4e5c75981 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h -+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h -@@ -1260,7 +1260,8 @@ struct pptable_funcs { - * @set_soft_freq_limited_range: Set the soft frequency range of a clock - * domain in MHz. - */ -- int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max); -+ int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max, -+ bool automatic); - - /** - * @set_power_source: Notify the SMU of the current power source. -diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h -index c2ab336bb530..ed8304d82831 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h -+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h -@@ -255,7 +255,7 @@ int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c - uint32_t *min, uint32_t *max); - - int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, -- uint32_t min, uint32_t max); -+ uint32_t min, uint32_t max, bool automatic); - - int smu_v11_0_set_hard_freq_limited_range(struct smu_context *smu, - enum smu_clk_type clk_type, -diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h -index 1ad2dff71090..0886d8cffbd0 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h -+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h -@@ -56,7 +56,7 @@ int smu_v12_0_set_default_dpm_tables(struct smu_context *smu); - int smu_v12_0_mode2_reset(struct smu_context *smu); - - int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, -- uint32_t min, uint32_t max); -+ uint32_t min, uint32_t max, bool automatic); - - int smu_v12_0_set_driver_table_location(struct smu_context *smu); - -diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h -index e58220a7ee2f..044d6893b43e 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h -+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h -@@ -219,7 +219,7 @@ int smu_v13_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c - uint32_t *min, uint32_t *max); - - int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, -- uint32_t min, uint32_t max); -+ uint32_t min, uint32_t max, bool automatic); - - int smu_v13_0_set_hard_freq_limited_range(struct smu_context *smu, - enum smu_clk_type clk_type, -diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h -index 46b456590a08..6cada19a8482 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h -+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h -@@ -186,7 +186,7 @@ int smu_v14_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c - uint32_t *min, uint32_t *max); - - int smu_v14_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, -- uint32_t min, uint32_t max); -+ uint32_t min, uint32_t max, bool automatic); - - int smu_v14_0_set_hard_freq_limited_range(struct smu_context *smu, - enum smu_clk_type clk_type, -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c -index 076620fa3ef5..306a07b366a8 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c -@@ -1689,7 +1689,7 @@ static int navi10_force_clk_levels(struct smu_context *smu, - if (ret) - return 0; - -- ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); -+ ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq, false); - if (ret) - return 0; - break; -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c -index 0d3e1a121b67..cbd5fcbb5547 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c -@@ -1469,7 +1469,7 @@ static int sienna_cichlid_force_clk_levels(struct smu_context *smu, - if (ret) - goto forec_level_out; - -- ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); -+ ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq, false); - if (ret) - goto forec_level_out; - break; -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c -index 16fcd9dcd202..16e7959879d4 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c -@@ -1763,7 +1763,8 @@ int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c - int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, - enum smu_clk_type clk_type, - uint32_t min, -- uint32_t max) -+ uint32_t max, -+ bool automatic) - { - int ret = 0, clk_id = 0; - uint32_t param; -@@ -1778,7 +1779,10 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, - return clk_id; - - if (max > 0) { -- param = (uint32_t)((clk_id << 16) | (max & 0xffff)); -+ if (automatic) -+ param = (uint32_t)((clk_id << 16) | 0xffff); -+ else -+ param = (uint32_t)((clk_id << 16) | (max & 0xffff)); - ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxByFreq, - param, NULL); - if (ret) -@@ -1786,7 +1790,10 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, - } - - if (min > 0) { -- param = (uint32_t)((clk_id << 16) | (min & 0xffff)); -+ if (automatic) -+ param = (uint32_t)((clk_id << 16) | 0); -+ else -+ param = (uint32_t)((clk_id << 16) | (min & 0xffff)); - ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMinByFreq, - param, NULL); - if (ret) -@@ -1854,6 +1861,7 @@ int smu_v11_0_set_performance_level(struct smu_context *smu, - uint32_t mclk_min = 0, mclk_max = 0; - uint32_t socclk_min = 0, socclk_max = 0; - int ret = 0; -+ bool auto_level = false; - - switch (level) { - case AMD_DPM_FORCED_LEVEL_HIGH: -@@ -1873,6 +1881,7 @@ int smu_v11_0_set_performance_level(struct smu_context *smu, - mclk_max = mem_table->max; - socclk_min = soc_table->min; - socclk_max = soc_table->max; -+ auto_level = true; - break; - case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD: - sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; -@@ -1905,13 +1914,15 @@ int smu_v11_0_set_performance_level(struct smu_context *smu, - if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 2)) { - mclk_min = mclk_max = 0; - socclk_min = socclk_max = 0; -+ auto_level = false; - } - - if (sclk_min && sclk_max) { - ret = smu_v11_0_set_soft_freq_limited_range(smu, - SMU_GFXCLK, - sclk_min, -- sclk_max); -+ sclk_max, -+ auto_level); - if (ret) - return ret; - } -@@ -1920,7 +1931,8 @@ int smu_v11_0_set_performance_level(struct smu_context *smu, - ret = smu_v11_0_set_soft_freq_limited_range(smu, - SMU_MCLK, - mclk_min, -- mclk_max); -+ mclk_max, -+ auto_level); - if (ret) - return ret; - } -@@ -1929,7 +1941,8 @@ int smu_v11_0_set_performance_level(struct smu_context *smu, - ret = smu_v11_0_set_soft_freq_limited_range(smu, - SMU_SOCCLK, - socclk_min, -- socclk_max); -+ socclk_max, -+ auto_level); - if (ret) - return ret; - } -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c -index 22737b11b1bf..a333ab827f48 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c -@@ -1091,9 +1091,10 @@ static int vangogh_set_power_profile_mode(struct smu_context *smu, long *input, - } - - static int vangogh_set_soft_freq_limited_range(struct smu_context *smu, -- enum smu_clk_type clk_type, -- uint32_t min, -- uint32_t max) -+ enum smu_clk_type clk_type, -+ uint32_t min, -+ uint32_t max, -+ bool automatic) - { - int ret = 0; - -@@ -1299,7 +1300,7 @@ static int vangogh_force_dpm_limit_value(struct smu_context *smu, bool highest) - return ret; - - force_freq = highest ? max_freq : min_freq; -- ret = vangogh_set_soft_freq_limited_range(smu, clk_type, force_freq, force_freq); -+ ret = vangogh_set_soft_freq_limited_range(smu, clk_type, force_freq, force_freq, false); - if (ret) - return ret; - } -@@ -1335,7 +1336,7 @@ static int vangogh_unforce_dpm_levels(struct smu_context *smu) - if (ret) - return ret; - -- ret = vangogh_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); -+ ret = vangogh_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq, false); - - if (ret) - return ret; -@@ -1354,7 +1355,7 @@ static int vangogh_set_peak_clock_by_device(struct smu_context *smu) - if (ret) - return ret; - -- ret = vangogh_set_soft_freq_limited_range(smu, SMU_FCLK, fclk_freq, fclk_freq); -+ ret = vangogh_set_soft_freq_limited_range(smu, SMU_FCLK, fclk_freq, fclk_freq, false); - if (ret) - return ret; - -@@ -1362,7 +1363,7 @@ static int vangogh_set_peak_clock_by_device(struct smu_context *smu) - if (ret) - return ret; - -- ret = vangogh_set_soft_freq_limited_range(smu, SMU_SOCCLK, socclk_freq, socclk_freq); -+ ret = vangogh_set_soft_freq_limited_range(smu, SMU_SOCCLK, socclk_freq, socclk_freq, false); - if (ret) - return ret; - -@@ -1370,7 +1371,7 @@ static int vangogh_set_peak_clock_by_device(struct smu_context *smu) - if (ret) - return ret; - -- ret = vangogh_set_soft_freq_limited_range(smu, SMU_VCLK, vclk_freq, vclk_freq); -+ ret = vangogh_set_soft_freq_limited_range(smu, SMU_VCLK, vclk_freq, vclk_freq, false); - if (ret) - return ret; - -@@ -1378,7 +1379,7 @@ static int vangogh_set_peak_clock_by_device(struct smu_context *smu) - if (ret) - return ret; - -- ret = vangogh_set_soft_freq_limited_range(smu, SMU_DCLK, dclk_freq, dclk_freq); -+ ret = vangogh_set_soft_freq_limited_range(smu, SMU_DCLK, dclk_freq, dclk_freq, false); - if (ret) - return ret; - -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c -index cc0504b063fa..0b210b1f2628 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c -@@ -707,7 +707,7 @@ static int renoir_force_dpm_limit_value(struct smu_context *smu, bool highest) - return ret; - - force_freq = highest ? max_freq : min_freq; -- ret = smu_v12_0_set_soft_freq_limited_range(smu, clk_type, force_freq, force_freq); -+ ret = smu_v12_0_set_soft_freq_limited_range(smu, clk_type, force_freq, force_freq, false); - if (ret) - return ret; - } -@@ -740,7 +740,7 @@ static int renoir_unforce_dpm_levels(struct smu_context *smu) { - if (ret) - return ret; - -- ret = smu_v12_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); -+ ret = smu_v12_0_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq, false); - if (ret) - return ret; - } -@@ -911,7 +911,7 @@ static int renoir_set_peak_clock_by_device(struct smu_context *smu) - if (ret) - return ret; - -- ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_SCLK, sclk_freq, sclk_freq); -+ ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_SCLK, sclk_freq, sclk_freq, false); - if (ret) - return ret; - -@@ -919,7 +919,7 @@ static int renoir_set_peak_clock_by_device(struct smu_context *smu) - if (ret) - return ret; - -- ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_UCLK, uclk_freq, uclk_freq); -+ ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_UCLK, uclk_freq, uclk_freq, false); - if (ret) - return ret; - -@@ -961,13 +961,13 @@ static int renior_set_dpm_profile_freq(struct smu_context *smu, - } - - if (sclk) -- ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_SCLK, sclk, sclk); -+ ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_SCLK, sclk, sclk, false); - - if (socclk) -- ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_SOCCLK, socclk, socclk); -+ ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_SOCCLK, socclk, socclk, false); - - if (fclk) -- ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_FCLK, fclk, fclk); -+ ret = smu_v12_0_set_soft_freq_limited_range(smu, SMU_FCLK, fclk, fclk, false); - - return ret; - } -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c -index ed15f5a0fd11..3d3cd546f0ad 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c -@@ -211,7 +211,7 @@ int smu_v12_0_mode2_reset(struct smu_context *smu) - } - - int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, -- uint32_t min, uint32_t max) -+ uint32_t min, uint32_t max, bool automatic) - { - int ret = 0; - -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c -index 2c35eb31475a..f6b029354327 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c -@@ -1297,9 +1297,10 @@ static int aldebaran_set_performance_level(struct smu_context *smu, - } - - static int aldebaran_set_soft_freq_limited_range(struct smu_context *smu, -- enum smu_clk_type clk_type, -- uint32_t min, -- uint32_t max) -+ enum smu_clk_type clk_type, -+ uint32_t min, -+ uint32_t max, -+ bool automatic) - { - struct smu_dpm_context *smu_dpm = &(smu->smu_dpm); - struct smu_13_0_dpm_context *dpm_context = smu_dpm->dpm_context; -@@ -1328,7 +1329,7 @@ static int aldebaran_set_soft_freq_limited_range(struct smu_context *smu, - return 0; - - ret = smu_v13_0_set_soft_freq_limited_range(smu, SMU_GFXCLK, -- min, max); -+ min, max, false); - if (!ret) { - pstate_table->gfxclk_pstate.curr.min = min; - pstate_table->gfxclk_pstate.curr.max = max; -@@ -1348,7 +1349,7 @@ static int aldebaran_set_soft_freq_limited_range(struct smu_context *smu, - /* Restore default min/max clocks and enable determinism */ - min_clk = dpm_context->dpm_tables.gfx_table.min; - max_clk = dpm_context->dpm_tables.gfx_table.max; -- ret = smu_v13_0_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk); -+ ret = smu_v13_0_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk, false); - if (!ret) { - usleep_range(500, 1000); - ret = smu_cmn_send_smc_msg_with_param(smu, -@@ -1422,7 +1423,7 @@ static int aldebaran_usr_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_ - min_clk = dpm_context->dpm_tables.gfx_table.min; - max_clk = dpm_context->dpm_tables.gfx_table.max; - -- return aldebaran_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk); -+ return aldebaran_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk, false); - } - break; - case PP_OD_COMMIT_DPM_TABLE: -@@ -1441,7 +1442,7 @@ static int aldebaran_usr_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_ - min_clk = pstate_table->gfxclk_pstate.custom.min; - max_clk = pstate_table->gfxclk_pstate.custom.max; - -- return aldebaran_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk); -+ return aldebaran_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk, false); - } - break; - default: -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c -index e17466cc1952..6cfd66363915 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c -@@ -1608,7 +1608,8 @@ int smu_v13_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c - int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu, - enum smu_clk_type clk_type, - uint32_t min, -- uint32_t max) -+ uint32_t max, -+ bool automatic) - { - int ret = 0, clk_id = 0; - uint32_t param; -@@ -1623,7 +1624,10 @@ int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu, - return clk_id; - - if (max > 0) { -- param = (uint32_t)((clk_id << 16) | (max & 0xffff)); -+ if (automatic) -+ param = (uint32_t)((clk_id << 16) | 0xffff); -+ else -+ param = (uint32_t)((clk_id << 16) | (max & 0xffff)); - ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxByFreq, - param, NULL); - if (ret) -@@ -1631,7 +1635,10 @@ int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu, - } - - if (min > 0) { -- param = (uint32_t)((clk_id << 16) | (min & 0xffff)); -+ if (automatic) -+ param = (uint32_t)((clk_id << 16) | 0); -+ else -+ param = (uint32_t)((clk_id << 16) | (min & 0xffff)); - ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMinByFreq, - param, NULL); - if (ret) -@@ -1708,6 +1715,7 @@ int smu_v13_0_set_performance_level(struct smu_context *smu, - uint32_t dclk_min = 0, dclk_max = 0; - uint32_t fclk_min = 0, fclk_max = 0; - int ret = 0, i; -+ bool auto_level = false; - - switch (level) { - case AMD_DPM_FORCED_LEVEL_HIGH: -@@ -1739,6 +1747,7 @@ int smu_v13_0_set_performance_level(struct smu_context *smu, - dclk_max = dclk_table->max; - fclk_min = fclk_table->min; - fclk_max = fclk_table->max; -+ auto_level = true; - break; - case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD: - sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; -@@ -1780,13 +1789,15 @@ int smu_v13_0_set_performance_level(struct smu_context *smu, - vclk_min = vclk_max = 0; - dclk_min = dclk_max = 0; - fclk_min = fclk_max = 0; -+ auto_level = false; - } - - if (sclk_min && sclk_max) { - ret = smu_v13_0_set_soft_freq_limited_range(smu, - SMU_GFXCLK, - sclk_min, -- sclk_max); -+ sclk_max, -+ auto_level); - if (ret) - return ret; - -@@ -1798,7 +1809,8 @@ int smu_v13_0_set_performance_level(struct smu_context *smu, - ret = smu_v13_0_set_soft_freq_limited_range(smu, - SMU_MCLK, - mclk_min, -- mclk_max); -+ mclk_max, -+ auto_level); - if (ret) - return ret; - -@@ -1810,7 +1822,8 @@ int smu_v13_0_set_performance_level(struct smu_context *smu, - ret = smu_v13_0_set_soft_freq_limited_range(smu, - SMU_SOCCLK, - socclk_min, -- socclk_max); -+ socclk_max, -+ auto_level); - if (ret) - return ret; - -@@ -1825,7 +1838,8 @@ int smu_v13_0_set_performance_level(struct smu_context *smu, - ret = smu_v13_0_set_soft_freq_limited_range(smu, - i ? SMU_VCLK1 : SMU_VCLK, - vclk_min, -- vclk_max); -+ vclk_max, -+ auto_level); - if (ret) - return ret; - } -@@ -1840,7 +1854,8 @@ int smu_v13_0_set_performance_level(struct smu_context *smu, - ret = smu_v13_0_set_soft_freq_limited_range(smu, - i ? SMU_DCLK1 : SMU_DCLK, - dclk_min, -- dclk_max); -+ dclk_max, -+ auto_level); - if (ret) - return ret; - } -@@ -1852,7 +1867,8 @@ int smu_v13_0_set_performance_level(struct smu_context *smu, - ret = smu_v13_0_set_soft_freq_limited_range(smu, - SMU_FCLK, - fclk_min, -- fclk_max); -+ fclk_max, -+ auto_level); - if (ret) - return ret; - -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c -index cb923e33fd6f..f69fe75352de 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c -@@ -1975,7 +1975,8 @@ static int smu_v13_0_0_force_clk_levels(struct smu_context *smu, - ret = smu_v13_0_set_soft_freq_limited_range(smu, - clk_type, - min_freq, -- max_freq); -+ max_freq, -+ false); - break; - case SMU_DCEFCLK: - case SMU_PCIE: -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c -index 9c2c43bfed0b..a71b7c0803f1 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c -@@ -811,9 +811,10 @@ static int smu_v13_0_5_get_dpm_ultimate_freq(struct smu_context *smu, - } - - static int smu_v13_0_5_set_soft_freq_limited_range(struct smu_context *smu, -- enum smu_clk_type clk_type, -- uint32_t min, -- uint32_t max) -+ enum smu_clk_type clk_type, -+ uint32_t min, -+ uint32_t max, -+ bool automatic) - { - enum smu_message_type msg_set_min, msg_set_max; - uint32_t min_clk = min; -@@ -950,7 +951,7 @@ static int smu_v13_0_5_force_clk_levels(struct smu_context *smu, - if (ret) - goto force_level_out; - -- ret = smu_v13_0_5_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); -+ ret = smu_v13_0_5_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq, false); - if (ret) - goto force_level_out; - break; -@@ -1046,9 +1047,10 @@ static int smu_v13_0_5_set_performance_level(struct smu_context *smu, - - if (sclk_min && sclk_max) { - ret = smu_v13_0_5_set_soft_freq_limited_range(smu, -- SMU_SCLK, -- sclk_min, -- sclk_max); -+ SMU_SCLK, -+ sclk_min, -+ sclk_max, -+ false); - if (ret) - return ret; - -@@ -1060,7 +1062,8 @@ static int smu_v13_0_5_set_performance_level(struct smu_context *smu, - ret = smu_v13_0_5_set_soft_freq_limited_range(smu, - SMU_VCLK, - vclk_min, -- vclk_max); -+ vclk_max, -+ false); - if (ret) - return ret; - } -@@ -1069,7 +1072,8 @@ static int smu_v13_0_5_set_performance_level(struct smu_context *smu, - ret = smu_v13_0_5_set_soft_freq_limited_range(smu, - SMU_DCLK, - dclk_min, -- dclk_max); -+ dclk_max, -+ false); - if (ret) - return ret; - } -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c -index 9974c9f8135e..8d2ccd8a8b0c 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c -@@ -1739,7 +1739,7 @@ static int smu_v13_0_6_set_performance_level(struct smu_context *smu, - if (uclk_table->max != pstate_table->uclk_pstate.curr.max) { - /* Min UCLK is not expected to be changed */ - ret = smu_v13_0_set_soft_freq_limited_range( -- smu, SMU_UCLK, 0, uclk_table->max); -+ smu, SMU_UCLK, 0, uclk_table->max, false); - if (ret) - return ret; - pstate_table->uclk_pstate.curr.max = uclk_table->max; -@@ -1758,7 +1758,8 @@ static int smu_v13_0_6_set_performance_level(struct smu_context *smu, - - static int smu_v13_0_6_set_soft_freq_limited_range(struct smu_context *smu, - enum smu_clk_type clk_type, -- uint32_t min, uint32_t max) -+ uint32_t min, uint32_t max, -+ bool automatic) - { - struct smu_dpm_context *smu_dpm = &(smu->smu_dpm); - struct smu_13_0_dpm_context *dpm_context = smu_dpm->dpm_context; -@@ -1806,7 +1807,7 @@ static int smu_v13_0_6_set_soft_freq_limited_range(struct smu_context *smu, - return -EOPNOTSUPP; - /* Only max clock limiting is allowed for UCLK */ - ret = smu_v13_0_set_soft_freq_limited_range( -- smu, SMU_UCLK, 0, max); -+ smu, SMU_UCLK, 0, max, false); - if (!ret) - pstate_table->uclk_pstate.curr.max = max; - } -@@ -1946,7 +1947,7 @@ static int smu_v13_0_6_usr_edit_dpm_table(struct smu_context *smu, - max_clk = dpm_context->dpm_tables.gfx_table.max; - - ret = smu_v13_0_6_set_soft_freq_limited_range( -- smu, SMU_GFXCLK, min_clk, max_clk); -+ smu, SMU_GFXCLK, min_clk, max_clk, false); - - if (ret) - return ret; -@@ -1954,7 +1955,7 @@ static int smu_v13_0_6_usr_edit_dpm_table(struct smu_context *smu, - min_clk = dpm_context->dpm_tables.uclk_table.min; - max_clk = dpm_context->dpm_tables.uclk_table.max; - ret = smu_v13_0_6_set_soft_freq_limited_range( -- smu, SMU_UCLK, min_clk, max_clk); -+ smu, SMU_UCLK, min_clk, max_clk, false); - if (ret) - return ret; - pstate_table->uclk_pstate.custom.max = 0; -@@ -1978,7 +1979,7 @@ static int smu_v13_0_6_usr_edit_dpm_table(struct smu_context *smu, - max_clk = pstate_table->gfxclk_pstate.custom.max; - - ret = smu_v13_0_6_set_soft_freq_limited_range( -- smu, SMU_GFXCLK, min_clk, max_clk); -+ smu, SMU_GFXCLK, min_clk, max_clk, false); - - if (ret) - return ret; -@@ -1989,7 +1990,7 @@ static int smu_v13_0_6_usr_edit_dpm_table(struct smu_context *smu, - min_clk = pstate_table->uclk_pstate.curr.min; - max_clk = pstate_table->uclk_pstate.custom.max; - return smu_v13_0_6_set_soft_freq_limited_range( -- smu, SMU_UCLK, min_clk, max_clk); -+ smu, SMU_UCLK, min_clk, max_clk, false); - } - break; - default: -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c -index b891a5e0a396..2077506ef336 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c -@@ -1964,7 +1964,8 @@ static int smu_v13_0_7_force_clk_levels(struct smu_context *smu, - ret = smu_v13_0_set_soft_freq_limited_range(smu, - clk_type, - min_freq, -- max_freq); -+ max_freq, -+ false); - break; - case SMU_DCEFCLK: - case SMU_PCIE: -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c -index 260c339f89c5..71d58c8c8cc0 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c -@@ -945,9 +945,10 @@ static int yellow_carp_get_dpm_ultimate_freq(struct smu_context *smu, - } - - static int yellow_carp_set_soft_freq_limited_range(struct smu_context *smu, -- enum smu_clk_type clk_type, -- uint32_t min, -- uint32_t max) -+ enum smu_clk_type clk_type, -+ uint32_t min, -+ uint32_t max, -+ bool automatic) - { - enum smu_message_type msg_set_min, msg_set_max; - uint32_t min_clk = min; -@@ -1134,7 +1135,7 @@ static int yellow_carp_force_clk_levels(struct smu_context *smu, - if (ret) - goto force_level_out; - -- ret = yellow_carp_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq); -+ ret = yellow_carp_set_soft_freq_limited_range(smu, clk_type, min_freq, max_freq, false); - if (ret) - goto force_level_out; - break; -@@ -1254,9 +1255,10 @@ static int yellow_carp_set_performance_level(struct smu_context *smu, - - if (sclk_min && sclk_max) { - ret = yellow_carp_set_soft_freq_limited_range(smu, -- SMU_SCLK, -- sclk_min, -- sclk_max); -+ SMU_SCLK, -+ sclk_min, -+ sclk_max, -+ false); - if (ret) - return ret; - -@@ -1266,18 +1268,20 @@ static int yellow_carp_set_performance_level(struct smu_context *smu, - - if (fclk_min && fclk_max) { - ret = yellow_carp_set_soft_freq_limited_range(smu, -- SMU_FCLK, -- fclk_min, -- fclk_max); -+ SMU_FCLK, -+ fclk_min, -+ fclk_max, -+ false); - if (ret) - return ret; - } - - if (socclk_min && socclk_max) { - ret = yellow_carp_set_soft_freq_limited_range(smu, -- SMU_SOCCLK, -- socclk_min, -- socclk_max); -+ SMU_SOCCLK, -+ socclk_min, -+ socclk_max, -+ false); - if (ret) - return ret; - } -@@ -1286,7 +1290,8 @@ static int yellow_carp_set_performance_level(struct smu_context *smu, - ret = yellow_carp_set_soft_freq_limited_range(smu, - SMU_VCLK, - vclk_min, -- vclk_max); -+ vclk_max, -+ false); - if (ret) - return ret; - } -@@ -1295,7 +1300,8 @@ static int yellow_carp_set_performance_level(struct smu_context *smu, - ret = yellow_carp_set_soft_freq_limited_range(smu, - SMU_DCLK, - dclk_min, -- dclk_max); -+ dclk_max, -+ false); - if (ret) - return ret; - } -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c -index 09973615f210..a7a6c4eea153 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c -@@ -1093,7 +1093,8 @@ int smu_v14_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c - int smu_v14_0_set_soft_freq_limited_range(struct smu_context *smu, - enum smu_clk_type clk_type, - uint32_t min, -- uint32_t max) -+ uint32_t max, -+ bool automatic) - { - int ret = 0, clk_id = 0; - uint32_t param; -@@ -1108,7 +1109,10 @@ int smu_v14_0_set_soft_freq_limited_range(struct smu_context *smu, - return clk_id; - - if (max > 0) { -- param = (uint32_t)((clk_id << 16) | (max & 0xffff)); -+ if (automatic) -+ param = (uint32_t)((clk_id << 16) | 0xffff); -+ else -+ param = (uint32_t)((clk_id << 16) | (max & 0xffff)); - ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxByFreq, - param, NULL); - if (ret) -@@ -1116,7 +1120,10 @@ int smu_v14_0_set_soft_freq_limited_range(struct smu_context *smu, - } - - if (min > 0) { -- param = (uint32_t)((clk_id << 16) | (min & 0xffff)); -+ if (automatic) -+ param = (uint32_t)((clk_id << 16) | 0); -+ else -+ param = (uint32_t)((clk_id << 16) | (min & 0xffff)); - ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMinByFreq, - param, NULL); - if (ret) -@@ -1193,6 +1200,7 @@ int smu_v14_0_set_performance_level(struct smu_context *smu, - uint32_t dclk_min = 0, dclk_max = 0; - uint32_t fclk_min = 0, fclk_max = 0; - int ret = 0, i; -+ bool auto_level = false; - - switch (level) { - case AMD_DPM_FORCED_LEVEL_HIGH: -@@ -1224,6 +1232,7 @@ int smu_v14_0_set_performance_level(struct smu_context *smu, - dclk_max = dclk_table->max; - fclk_min = fclk_table->min; - fclk_max = fclk_table->max; -+ auto_level = true; - break; - case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD: - sclk_min = sclk_max = pstate_table->gfxclk_pstate.standard; -@@ -1259,7 +1268,8 @@ int smu_v14_0_set_performance_level(struct smu_context *smu, - ret = smu_v14_0_set_soft_freq_limited_range(smu, - SMU_GFXCLK, - sclk_min, -- sclk_max); -+ sclk_max, -+ auto_level); - if (ret) - return ret; - -@@ -1271,7 +1281,8 @@ int smu_v14_0_set_performance_level(struct smu_context *smu, - ret = smu_v14_0_set_soft_freq_limited_range(smu, - SMU_MCLK, - mclk_min, -- mclk_max); -+ mclk_max, -+ auto_level); - if (ret) - return ret; - -@@ -1283,7 +1294,8 @@ int smu_v14_0_set_performance_level(struct smu_context *smu, - ret = smu_v14_0_set_soft_freq_limited_range(smu, - SMU_SOCCLK, - socclk_min, -- socclk_max); -+ socclk_max, -+ auto_level); - if (ret) - return ret; - -@@ -1298,7 +1310,8 @@ int smu_v14_0_set_performance_level(struct smu_context *smu, - ret = smu_v14_0_set_soft_freq_limited_range(smu, - i ? SMU_VCLK1 : SMU_VCLK, - vclk_min, -- vclk_max); -+ vclk_max, -+ auto_level); - if (ret) - return ret; - } -@@ -1313,7 +1326,8 @@ int smu_v14_0_set_performance_level(struct smu_context *smu, - ret = smu_v14_0_set_soft_freq_limited_range(smu, - i ? SMU_DCLK1 : SMU_DCLK, - dclk_min, -- dclk_max); -+ dclk_max, -+ auto_level); - if (ret) - return ret; - } -@@ -1325,7 +1339,8 @@ int smu_v14_0_set_performance_level(struct smu_context *smu, - ret = smu_v14_0_set_soft_freq_limited_range(smu, - SMU_FCLK, - fclk_min, -- fclk_max); -+ fclk_max, -+ auto_level); - if (ret) - return ret; - -diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c -index ba17d01e6439..6c0f3505bb55 100644 ---- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c -+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c -@@ -1245,7 +1245,8 @@ static int smu_v14_0_2_force_clk_levels(struct smu_context *smu, - ret = smu_v14_0_set_soft_freq_limited_range(smu, - clk_type, - min_freq, -- max_freq); -+ max_freq, -+ false); - break; - case SMU_DCEFCLK: - case SMU_PCIE: diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index f68a41eeb1fa..6cd386d0fccb 100644 --- a/drivers/gpu/drm/drm_edid.c @@ -13211,46 +11503,38 @@ index 02afeb3acce4..5aef7fa37878 100644 resource_len = pci_resource_len(pdev, bar_id); rtwpci->mmap = pci_iomap(pdev, bar_id, resource_len); -diff --git a/drivers/platform/x86/dell/dell-wmi-base.c b/drivers/platform/x86/dell/dell-wmi-base.c -index 502783a7adb1..24fd7ffadda9 100644 ---- a/drivers/platform/x86/dell/dell-wmi-base.c -+++ b/drivers/platform/x86/dell/dell-wmi-base.c -@@ -264,6 +264,15 @@ static const struct key_entry dell_wmi_keymap_type_0010[] = { - /*Speaker Mute*/ - { KE_KEY, 0x109, { KEY_MUTE} }, - -+ /* S2Idle screen off */ -+ { KE_IGNORE, 0x120, { KEY_RESERVED }}, -+ -+ /* Leaving S4 or S2Idle suspend */ -+ { KE_IGNORE, 0x130, { KEY_RESERVED }}, -+ -+ /* Entering S2Idle suspend */ -+ { KE_IGNORE, 0x140, { KEY_RESERVED }}, -+ - /* Mic mute */ - { KE_KEY, 0x150, { KEY_MICMUTE } }, - diff --git a/mm/mmap.c b/mm/mmap.c -index 18fddcce03b8..d84d6dd8771c 100644 +index 18fddcce03b8..8a04f29aa423 100644 --- a/mm/mmap.c +++ b/mm/mmap.c -@@ -1952,10 +1952,6 @@ __get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, +@@ -1952,7 +1952,8 @@ __get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, if (get_area) { addr = get_area(file, addr, len, pgoff, flags); - } else if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE)) { -- /* Ensures that larger anonymous mappings are THP aligned. */ -- addr = thp_get_unmapped_area_vmflags(file, addr, len, -- pgoff, flags, vm_flags); - } else { - addr = mm_get_unmapped_area_vmflags(current->mm, file, addr, len, - pgoff, flags, vm_flags); ++ } else if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE) ++ && IS_ALIGNED(len, PMD_SIZE)) { + /* Ensures that larger anonymous mappings are THP aligned. */ + addr = thp_get_unmapped_area_vmflags(file, addr, len, + pgoff, flags, vm_flags); diff --git a/mm/shrinker.c b/mm/shrinker.c -index dc5d2a6fcfc4..e4b795ee6d2e 100644 +index dc5d2a6fcfc4..4a93fd433689 100644 --- a/mm/shrinker.c +++ b/mm/shrinker.c -@@ -87,8 +87,10 @@ int alloc_shrinker_info(struct mem_cgroup *memcg) +@@ -76,19 +76,21 @@ void free_shrinker_info(struct mem_cgroup *memcg) + + int alloc_shrinker_info(struct mem_cgroup *memcg) + { +- struct shrinker_info *info; + int nid, ret = 0; + int array_size = 0; + + mutex_lock(&shrinker_mutex); + array_size = shrinker_unit_size(shrinker_nr_max); + for_each_node(nid) { +- info = kvzalloc_node(sizeof(*info) + array_size, GFP_KERNEL, nid); ++ struct shrinker_info *info = kvzalloc_node(sizeof(*info) + array_size, ++ GFP_KERNEL, nid); if (!info) goto err; info->map_nr_max = shrinker_nr_max; @@ -13262,53 +11546,15 @@ index dc5d2a6fcfc4..e4b795ee6d2e 100644 rcu_assign_pointer(memcg->nodeinfo[nid]->shrinker_info, info); } mutex_unlock(&shrinker_mutex); -diff --git a/net/netfilter/xt_NFLOG.c b/net/netfilter/xt_NFLOG.c -index d80abd6ccaf8..6dcf4bc7e30b 100644 ---- a/net/netfilter/xt_NFLOG.c -+++ b/net/netfilter/xt_NFLOG.c -@@ -79,7 +79,7 @@ static struct xt_target nflog_tg_reg[] __read_mostly = { - { - .name = "NFLOG", - .revision = 0, -- .family = NFPROTO_IPV4, -+ .family = NFPROTO_IPV6, - .checkentry = nflog_tg_check, - .destroy = nflog_tg_destroy, - .target = nflog_tg, -diff --git a/net/netfilter/xt_TRACE.c b/net/netfilter/xt_TRACE.c -index f3fa4f11348c..a642ff09fc8e 100644 ---- a/net/netfilter/xt_TRACE.c -+++ b/net/netfilter/xt_TRACE.c -@@ -49,6 +49,7 @@ static struct xt_target trace_tg_reg[] __read_mostly = { - .target = trace_tg, - .checkentry = trace_tg_check, - .destroy = trace_tg_destroy, -+ .me = THIS_MODULE, - }, - #endif - }; -diff --git a/net/netfilter/xt_mark.c b/net/netfilter/xt_mark.c -index f76fe04fc9a4..65b965ca40ea 100644 ---- a/net/netfilter/xt_mark.c -+++ b/net/netfilter/xt_mark.c -@@ -62,7 +62,7 @@ static struct xt_target mark_tg_reg[] __read_mostly = { - { - .name = "MARK", - .revision = 2, -- .family = NFPROTO_IPV4, -+ .family = NFPROTO_IPV6, - .target = mark_tg, - .targetsize = sizeof(struct xt_mark_tginfo2), - .me = THIS_MODULE, -- -2.47.0.rc0 +2.47.0 -From 13dcfcc62c4c4467d7f8c9d1436097cdd70c0cec Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:52:43 +0800 -Subject: [PATCH 07/13] intel-pstate +From 19c7eed02bcf056464e7a65fef6df3ee828843b1 Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:15:05 +0100 +Subject: [PATCH 07/12] intel-pstate -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- arch/x86/include/asm/topology.h | 13 ++ arch/x86/kernel/cpu/aperfmperf.c | 89 +++++++++++- @@ -13785,14 +12031,14 @@ index 348a330678bd..c11be253bfa3 100644 } -- -2.47.0.rc0 +2.47.0 -From ac05835cead1a0a20b6297fdb0f7c47326d0ff71 Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:52:52 +0800 -Subject: [PATCH 08/13] ksm +From e5f623fa904e2cd611cf7e5c90dcdb9555909b6e Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:15:23 +0100 +Subject: [PATCH 08/12] ksm -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- arch/alpha/kernel/syscalls/syscall.tbl | 3 + arch/arm/tools/syscall.tbl | 3 + @@ -14218,14 +12464,14 @@ index 01071182763e..7394bad8178e 100644 +464 common process_ksm_disable sys_process_ksm_disable sys_process_ksm_disable +465 common process_ksm_status sys_process_ksm_status sys_process_ksm_status -- -2.47.0.rc0 +2.47.0 -From 727728c9e456e4484ef8e1a05a66f78a90e1c24a Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:53:03 +0800 -Subject: [PATCH 09/13] ntsync +From c3e54867da3e3b223071b86ea497f21c551774eb Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:15:35 +0100 +Subject: [PATCH 09/12] ntsync -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- Documentation/userspace-api/index.rst | 1 + Documentation/userspace-api/ntsync.rst | 398 +++++ @@ -17307,922 +15553,14 @@ index 000000000000..5fa2c9a0768c + +TEST_HARNESS_MAIN -- -2.47.0.rc0 +2.47.0 -From 94b78b402e239cd15095fa2d3e07f99a060a4b45 Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:53:18 +0800 -Subject: [PATCH 10/13] perf-per-core +From 669ed9174a34e7240a8364a3fae9d1d23c55087a Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:16:21 +0100 +Subject: [PATCH 10/12] t2 -Signed-off-by: Eric Naim ---- - Documentation/arch/x86/topology.rst | 4 + - arch/x86/events/rapl.c | 418 ++++++++++++++++++-------- - arch/x86/include/asm/processor.h | 1 + - arch/x86/include/asm/topology.h | 1 + - arch/x86/kernel/cpu/debugfs.c | 1 + - arch/x86/kernel/cpu/topology_common.c | 1 + - 6 files changed, 305 insertions(+), 121 deletions(-) - -diff --git a/Documentation/arch/x86/topology.rst b/Documentation/arch/x86/topology.rst -index 7352ab89a55a..c12837e61bda 100644 ---- a/Documentation/arch/x86/topology.rst -+++ b/Documentation/arch/x86/topology.rst -@@ -135,6 +135,10 @@ Thread-related topology information in the kernel: - The ID of the core to which a thread belongs. It is also printed in /proc/cpuinfo - "core_id." - -+ - topology_logical_core_id(); -+ -+ The logical core ID to which a thread belongs. -+ - - - System topology examples -diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c -index b985ca79cf97..8206038a01ac 100644 ---- a/arch/x86/events/rapl.c -+++ b/arch/x86/events/rapl.c -@@ -39,6 +39,10 @@ - * event: rapl_energy_psys - * perf code: 0x5 - * -+ * per_core counter: consumption of a single physical core -+ * event: rapl_energy_per_core (power_per_core PMU) -+ * perf code: 0x1 -+ * - * We manage those counters as free running (read-only). They may be - * use simultaneously by other tools, such as turbostat. - * -@@ -70,18 +74,25 @@ MODULE_LICENSE("GPL"); - /* - * RAPL energy status counters - */ --enum perf_rapl_events { -+enum perf_rapl_pkg_events { - PERF_RAPL_PP0 = 0, /* all cores */ - PERF_RAPL_PKG, /* entire package */ - PERF_RAPL_RAM, /* DRAM */ - PERF_RAPL_PP1, /* gpu */ - PERF_RAPL_PSYS, /* psys */ - -- PERF_RAPL_MAX, -- NR_RAPL_DOMAINS = PERF_RAPL_MAX, -+ PERF_RAPL_PKG_EVENTS_MAX, -+ NR_RAPL_PKG_DOMAINS = PERF_RAPL_PKG_EVENTS_MAX, -+}; -+ -+enum perf_rapl_core_events { -+ PERF_RAPL_PER_CORE = 0, /* per-core */ -+ -+ PERF_RAPL_CORE_EVENTS_MAX, -+ NR_RAPL_CORE_DOMAINS = PERF_RAPL_CORE_EVENTS_MAX, - }; - --static const char *const rapl_domain_names[NR_RAPL_DOMAINS] __initconst = { -+static const char *const rapl_pkg_domain_names[NR_RAPL_PKG_DOMAINS] __initconst = { - "pp0-core", - "package", - "dram", -@@ -89,6 +100,10 @@ static const char *const rapl_domain_names[NR_RAPL_DOMAINS] __initconst = { - "psys", - }; - -+static const char *const rapl_core_domain_names[NR_RAPL_CORE_DOMAINS] __initconst = { -+ "per-core", -+}; -+ - /* - * event code: LSB 8 bits, passed in attr->config - * any other bit is reserved -@@ -103,6 +118,10 @@ static struct perf_pmu_events_attr event_attr_##v = { \ - .event_str = str, \ - }; - -+#define rapl_pmu_is_pkg_scope() \ -+ (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || \ -+ boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) -+ - struct rapl_pmu { - raw_spinlock_t lock; - int n_active; -@@ -115,8 +134,9 @@ struct rapl_pmu { - - struct rapl_pmus { - struct pmu pmu; -+ cpumask_t cpumask; - unsigned int nr_rapl_pmu; -- struct rapl_pmu *pmus[] __counted_by(nr_rapl_pmu); -+ struct rapl_pmu *rapl_pmu[] __counted_by(nr_rapl_pmu); - }; - - enum rapl_unit_quirk { -@@ -126,29 +146,45 @@ enum rapl_unit_quirk { - }; - - struct rapl_model { -- struct perf_msr *rapl_msrs; -- unsigned long events; -+ struct perf_msr *rapl_pkg_msrs; -+ struct perf_msr *rapl_core_msrs; -+ unsigned long pkg_events; -+ unsigned long core_events; - unsigned int msr_power_unit; - enum rapl_unit_quirk unit_quirk; - }; - - /* 1/2^hw_unit Joule */ --static int rapl_hw_unit[NR_RAPL_DOMAINS] __read_mostly; --static struct rapl_pmus *rapl_pmus; --static cpumask_t rapl_cpu_mask; --static unsigned int rapl_cntr_mask; -+static int rapl_hw_unit[NR_RAPL_PKG_DOMAINS] __read_mostly; -+static struct rapl_pmus *rapl_pmus_pkg; -+static struct rapl_pmus *rapl_pmus_core; -+static unsigned int rapl_pkg_cntr_mask; -+static unsigned int rapl_core_cntr_mask; - static u64 rapl_timer_ms; --static struct perf_msr *rapl_msrs; -+static struct rapl_model *rapl_model; -+ -+static inline unsigned int get_rapl_pmu_idx(int cpu) -+{ -+ return rapl_pmu_is_pkg_scope() ? topology_logical_package_id(cpu) : -+ topology_logical_die_id(cpu); -+} -+ -+static inline const struct cpumask *get_rapl_pmu_cpumask(int cpu) -+{ -+ return rapl_pmu_is_pkg_scope() ? topology_core_cpumask(cpu) : -+ topology_die_cpumask(cpu); -+} - - static inline struct rapl_pmu *cpu_to_rapl_pmu(unsigned int cpu) - { -- unsigned int rapl_pmu_idx = topology_logical_die_id(cpu); -+ unsigned int rapl_pmu_idx = get_rapl_pmu_idx(cpu); - - /* - * The unsigned check also catches the '-1' return value for non - * existent mappings in the topology map. - */ -- return rapl_pmu_idx < rapl_pmus->nr_rapl_pmu ? rapl_pmus->pmus[rapl_pmu_idx] : NULL; -+ return rapl_pmu_idx < rapl_pmus_pkg->nr_rapl_pmu ? -+ rapl_pmus_pkg->rapl_pmu[rapl_pmu_idx] : NULL; - } - - static inline u64 rapl_read_counter(struct perf_event *event) -@@ -160,7 +196,7 @@ static inline u64 rapl_read_counter(struct perf_event *event) - - static inline u64 rapl_scale(u64 v, int cfg) - { -- if (cfg > NR_RAPL_DOMAINS) { -+ if (cfg > NR_RAPL_PKG_DOMAINS) { - pr_warn("Invalid domain %d, failed to scale data\n", cfg); - return v; - } -@@ -212,34 +248,34 @@ static void rapl_start_hrtimer(struct rapl_pmu *pmu) - - static enum hrtimer_restart rapl_hrtimer_handle(struct hrtimer *hrtimer) - { -- struct rapl_pmu *pmu = container_of(hrtimer, struct rapl_pmu, hrtimer); -+ struct rapl_pmu *rapl_pmu = container_of(hrtimer, struct rapl_pmu, hrtimer); - struct perf_event *event; - unsigned long flags; - -- if (!pmu->n_active) -+ if (!rapl_pmu->n_active) - return HRTIMER_NORESTART; - -- raw_spin_lock_irqsave(&pmu->lock, flags); -+ raw_spin_lock_irqsave(&rapl_pmu->lock, flags); - -- list_for_each_entry(event, &pmu->active_list, active_entry) -+ list_for_each_entry(event, &rapl_pmu->active_list, active_entry) - rapl_event_update(event); - -- raw_spin_unlock_irqrestore(&pmu->lock, flags); -+ raw_spin_unlock_irqrestore(&rapl_pmu->lock, flags); - -- hrtimer_forward_now(hrtimer, pmu->timer_interval); -+ hrtimer_forward_now(hrtimer, rapl_pmu->timer_interval); - - return HRTIMER_RESTART; - } - --static void rapl_hrtimer_init(struct rapl_pmu *pmu) -+static void rapl_hrtimer_init(struct rapl_pmu *rapl_pmu) - { -- struct hrtimer *hr = &pmu->hrtimer; -+ struct hrtimer *hr = &rapl_pmu->hrtimer; - - hrtimer_init(hr, CLOCK_MONOTONIC, HRTIMER_MODE_REL); - hr->function = rapl_hrtimer_handle; - } - --static void __rapl_pmu_event_start(struct rapl_pmu *pmu, -+static void __rapl_pmu_event_start(struct rapl_pmu *rapl_pmu, - struct perf_event *event) - { - if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED))) -@@ -247,39 +283,39 @@ static void __rapl_pmu_event_start(struct rapl_pmu *pmu, - - event->hw.state = 0; - -- list_add_tail(&event->active_entry, &pmu->active_list); -+ list_add_tail(&event->active_entry, &rapl_pmu->active_list); - - local64_set(&event->hw.prev_count, rapl_read_counter(event)); - -- pmu->n_active++; -- if (pmu->n_active == 1) -- rapl_start_hrtimer(pmu); -+ rapl_pmu->n_active++; -+ if (rapl_pmu->n_active == 1) -+ rapl_start_hrtimer(rapl_pmu); - } - - static void rapl_pmu_event_start(struct perf_event *event, int mode) - { -- struct rapl_pmu *pmu = event->pmu_private; -+ struct rapl_pmu *rapl_pmu = event->pmu_private; - unsigned long flags; - -- raw_spin_lock_irqsave(&pmu->lock, flags); -- __rapl_pmu_event_start(pmu, event); -- raw_spin_unlock_irqrestore(&pmu->lock, flags); -+ raw_spin_lock_irqsave(&rapl_pmu->lock, flags); -+ __rapl_pmu_event_start(rapl_pmu, event); -+ raw_spin_unlock_irqrestore(&rapl_pmu->lock, flags); - } - - static void rapl_pmu_event_stop(struct perf_event *event, int mode) - { -- struct rapl_pmu *pmu = event->pmu_private; -+ struct rapl_pmu *rapl_pmu = event->pmu_private; - struct hw_perf_event *hwc = &event->hw; - unsigned long flags; - -- raw_spin_lock_irqsave(&pmu->lock, flags); -+ raw_spin_lock_irqsave(&rapl_pmu->lock, flags); - - /* mark event as deactivated and stopped */ - if (!(hwc->state & PERF_HES_STOPPED)) { -- WARN_ON_ONCE(pmu->n_active <= 0); -- pmu->n_active--; -- if (pmu->n_active == 0) -- hrtimer_cancel(&pmu->hrtimer); -+ WARN_ON_ONCE(rapl_pmu->n_active <= 0); -+ rapl_pmu->n_active--; -+ if (rapl_pmu->n_active == 0) -+ hrtimer_cancel(&rapl_pmu->hrtimer); - - list_del(&event->active_entry); - -@@ -297,23 +333,23 @@ static void rapl_pmu_event_stop(struct perf_event *event, int mode) - hwc->state |= PERF_HES_UPTODATE; - } - -- raw_spin_unlock_irqrestore(&pmu->lock, flags); -+ raw_spin_unlock_irqrestore(&rapl_pmu->lock, flags); - } - - static int rapl_pmu_event_add(struct perf_event *event, int mode) - { -- struct rapl_pmu *pmu = event->pmu_private; -+ struct rapl_pmu *rapl_pmu = event->pmu_private; - struct hw_perf_event *hwc = &event->hw; - unsigned long flags; - -- raw_spin_lock_irqsave(&pmu->lock, flags); -+ raw_spin_lock_irqsave(&rapl_pmu->lock, flags); - - hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED; - - if (mode & PERF_EF_START) -- __rapl_pmu_event_start(pmu, event); -+ __rapl_pmu_event_start(rapl_pmu, event); - -- raw_spin_unlock_irqrestore(&pmu->lock, flags); -+ raw_spin_unlock_irqrestore(&rapl_pmu->lock, flags); - - return 0; - } -@@ -327,10 +363,14 @@ static int rapl_pmu_event_init(struct perf_event *event) - { - u64 cfg = event->attr.config & RAPL_EVENT_MASK; - int bit, ret = 0; -- struct rapl_pmu *pmu; -+ struct rapl_pmu *rapl_pmu; -+ struct rapl_pmus *curr_rapl_pmus; - - /* only look at RAPL events */ -- if (event->attr.type != rapl_pmus->pmu.type) -+ if (event->attr.type == rapl_pmus_pkg->pmu.type || -+ (rapl_pmus_core && event->attr.type == rapl_pmus_core->pmu.type)) -+ curr_rapl_pmus = container_of(event->pmu, struct rapl_pmus, pmu); -+ else - return -ENOENT; - - /* check only supported bits are set */ -@@ -340,16 +380,18 @@ static int rapl_pmu_event_init(struct perf_event *event) - if (event->cpu < 0) - return -EINVAL; - -- event->event_caps |= PERF_EV_CAP_READ_ACTIVE_PKG; -+ if (curr_rapl_pmus == rapl_pmus_pkg) -+ event->event_caps |= PERF_EV_CAP_READ_ACTIVE_PKG; - -- if (!cfg || cfg >= NR_RAPL_DOMAINS + 1) -+ if (!cfg || cfg >= NR_RAPL_PKG_DOMAINS + 1) - return -EINVAL; - -- cfg = array_index_nospec((long)cfg, NR_RAPL_DOMAINS + 1); -+ cfg = array_index_nospec((long)cfg, NR_RAPL_PKG_DOMAINS + 1); - bit = cfg - 1; - - /* check event supported */ -- if (!(rapl_cntr_mask & (1 << bit))) -+ if (!(rapl_pkg_cntr_mask & (1 << bit)) && -+ !(rapl_core_cntr_mask & (1 << bit))) - return -EINVAL; - - /* unsupported modes and filters */ -@@ -357,12 +399,18 @@ static int rapl_pmu_event_init(struct perf_event *event) - return -EINVAL; - - /* must be done before validate_group */ -- pmu = cpu_to_rapl_pmu(event->cpu); -- if (!pmu) -+ if (curr_rapl_pmus == rapl_pmus_core) { -+ rapl_pmu = curr_rapl_pmus->rapl_pmu[topology_logical_core_id(event->cpu)]; -+ event->hw.event_base = rapl_model->rapl_core_msrs[bit].msr; -+ } else { -+ rapl_pmu = curr_rapl_pmus->rapl_pmu[get_rapl_pmu_idx(event->cpu)]; -+ event->hw.event_base = rapl_model->rapl_pkg_msrs[bit].msr; -+ } -+ -+ if (!rapl_pmu) - return -EINVAL; -- event->cpu = pmu->cpu; -- event->pmu_private = pmu; -- event->hw.event_base = rapl_msrs[bit].msr; -+ event->cpu = rapl_pmu->cpu; -+ event->pmu_private = rapl_pmu; - event->hw.config = cfg; - event->hw.idx = bit; - -@@ -377,7 +425,7 @@ static void rapl_pmu_event_read(struct perf_event *event) - static ssize_t rapl_get_attr_cpumask(struct device *dev, - struct device_attribute *attr, char *buf) - { -- return cpumap_print_to_pagebuf(true, buf, &rapl_cpu_mask); -+ return cpumap_print_to_pagebuf(true, buf, &rapl_pmus_pkg->cpumask); - } - - static DEVICE_ATTR(cpumask, S_IRUGO, rapl_get_attr_cpumask, NULL); -@@ -391,17 +439,38 @@ static struct attribute_group rapl_pmu_attr_group = { - .attrs = rapl_pmu_attrs, - }; - -+static ssize_t rapl_get_attr_per_core_cpumask(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ return cpumap_print_to_pagebuf(true, buf, &rapl_pmus_core->cpumask); -+} -+ -+static struct device_attribute dev_attr_per_core_cpumask = __ATTR(cpumask, 0444, -+ rapl_get_attr_per_core_cpumask, -+ NULL); -+ -+static struct attribute *rapl_pmu_per_core_attrs[] = { -+ &dev_attr_per_core_cpumask.attr, -+ NULL, -+}; -+ -+static struct attribute_group rapl_pmu_per_core_attr_group = { -+ .attrs = rapl_pmu_per_core_attrs, -+}; -+ - RAPL_EVENT_ATTR_STR(energy-cores, rapl_cores, "event=0x01"); - RAPL_EVENT_ATTR_STR(energy-pkg , rapl_pkg, "event=0x02"); - RAPL_EVENT_ATTR_STR(energy-ram , rapl_ram, "event=0x03"); - RAPL_EVENT_ATTR_STR(energy-gpu , rapl_gpu, "event=0x04"); - RAPL_EVENT_ATTR_STR(energy-psys, rapl_psys, "event=0x05"); -+RAPL_EVENT_ATTR_STR(energy-per-core, rapl_per_core, "event=0x01"); - - RAPL_EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules"); - RAPL_EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit, "Joules"); - RAPL_EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules"); - RAPL_EVENT_ATTR_STR(energy-gpu.unit , rapl_gpu_unit, "Joules"); - RAPL_EVENT_ATTR_STR(energy-psys.unit, rapl_psys_unit, "Joules"); -+RAPL_EVENT_ATTR_STR(energy-per-core.unit, rapl_per_core_unit, "Joules"); - - /* - * we compute in 0.23 nJ increments regardless of MSR -@@ -411,6 +480,7 @@ RAPL_EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scale, "2.3283064365386962890 - RAPL_EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3283064365386962890625e-10"); - RAPL_EVENT_ATTR_STR(energy-gpu.scale, rapl_gpu_scale, "2.3283064365386962890625e-10"); - RAPL_EVENT_ATTR_STR(energy-psys.scale, rapl_psys_scale, "2.3283064365386962890625e-10"); -+RAPL_EVENT_ATTR_STR(energy-per-core.scale, rapl_per_core_scale, "2.3283064365386962890625e-10"); - - /* - * There are no default events, but we need to create -@@ -444,6 +514,13 @@ static const struct attribute_group *rapl_attr_groups[] = { - NULL, - }; - -+static const struct attribute_group *rapl_per_core_attr_groups[] = { -+ &rapl_pmu_per_core_attr_group, -+ &rapl_pmu_format_group, -+ &rapl_pmu_events_group, -+ NULL, -+}; -+ - static struct attribute *rapl_events_cores[] = { - EVENT_PTR(rapl_cores), - EVENT_PTR(rapl_cores_unit), -@@ -504,6 +581,18 @@ static struct attribute_group rapl_events_psys_group = { - .attrs = rapl_events_psys, - }; - -+static struct attribute *rapl_events_per_core[] = { -+ EVENT_PTR(rapl_per_core), -+ EVENT_PTR(rapl_per_core_unit), -+ EVENT_PTR(rapl_per_core_scale), -+ NULL, -+}; -+ -+static struct attribute_group rapl_events_per_core_group = { -+ .name = "events", -+ .attrs = rapl_events_per_core, -+}; -+ - static bool test_msr(int idx, void *data) - { - return test_bit(idx, (unsigned long *) data); -@@ -529,11 +618,11 @@ static struct perf_msr intel_rapl_spr_msrs[] = { - }; - - /* -- * Force to PERF_RAPL_MAX size due to: -- * - perf_msr_probe(PERF_RAPL_MAX) -+ * Force to PERF_RAPL_PKG_EVENTS_MAX size due to: -+ * - perf_msr_probe(PERF_RAPL_PKG_EVENTS_MAX) - * - want to use same event codes across both architectures - */ --static struct perf_msr amd_rapl_msrs[] = { -+static struct perf_msr amd_rapl_pkg_msrs[] = { - [PERF_RAPL_PP0] = { 0, &rapl_events_cores_group, NULL, false, 0 }, - [PERF_RAPL_PKG] = { MSR_AMD_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr, false, RAPL_MSR_MASK }, - [PERF_RAPL_RAM] = { 0, &rapl_events_ram_group, NULL, false, 0 }, -@@ -541,72 +630,104 @@ static struct perf_msr amd_rapl_msrs[] = { - [PERF_RAPL_PSYS] = { 0, &rapl_events_psys_group, NULL, false, 0 }, - }; - --static int rapl_cpu_offline(unsigned int cpu) -+static struct perf_msr amd_rapl_core_msrs[] = { -+ [PERF_RAPL_PER_CORE] = { MSR_AMD_CORE_ENERGY_STATUS, &rapl_events_per_core_group, -+ test_msr, false, RAPL_MSR_MASK }, -+}; -+ -+static int __rapl_cpu_offline(struct rapl_pmus *rapl_pmus, unsigned int rapl_pmu_idx, -+ const struct cpumask *event_cpumask, unsigned int cpu) - { -- struct rapl_pmu *pmu = cpu_to_rapl_pmu(cpu); -+ struct rapl_pmu *rapl_pmu = rapl_pmus->rapl_pmu[rapl_pmu_idx]; - int target; - - /* Check if exiting cpu is used for collecting rapl events */ -- if (!cpumask_test_and_clear_cpu(cpu, &rapl_cpu_mask)) -+ if (!cpumask_test_and_clear_cpu(cpu, &rapl_pmus->cpumask)) - return 0; - -- pmu->cpu = -1; -+ rapl_pmu->cpu = -1; - /* Find a new cpu to collect rapl events */ -- target = cpumask_any_but(topology_die_cpumask(cpu), cpu); -+ target = cpumask_any_but(event_cpumask, cpu); - - /* Migrate rapl events to the new target */ - if (target < nr_cpu_ids) { -- cpumask_set_cpu(target, &rapl_cpu_mask); -- pmu->cpu = target; -- perf_pmu_migrate_context(pmu->pmu, cpu, target); -+ cpumask_set_cpu(target, &rapl_pmus->cpumask); -+ rapl_pmu->cpu = target; -+ perf_pmu_migrate_context(rapl_pmu->pmu, cpu, target); - } - return 0; - } - --static int rapl_cpu_online(unsigned int cpu) -+static int rapl_cpu_offline(unsigned int cpu) -+{ -+ int ret = __rapl_cpu_offline(rapl_pmus_pkg, get_rapl_pmu_idx(cpu), -+ get_rapl_pmu_cpumask(cpu), cpu); -+ -+ if (ret == 0 && rapl_model->core_events) -+ ret = __rapl_cpu_offline(rapl_pmus_core, topology_logical_core_id(cpu), -+ topology_sibling_cpumask(cpu), cpu); -+ -+ return ret; -+} -+ -+static int __rapl_cpu_online(struct rapl_pmus *rapl_pmus, unsigned int rapl_pmu_idx, -+ const struct cpumask *event_cpumask, unsigned int cpu) - { -- struct rapl_pmu *pmu = cpu_to_rapl_pmu(cpu); -+ struct rapl_pmu *rapl_pmu = rapl_pmus->rapl_pmu[rapl_pmu_idx]; - int target; - -- if (!pmu) { -- pmu = kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_node(cpu)); -- if (!pmu) -+ if (!rapl_pmu) { -+ rapl_pmu = kzalloc_node(sizeof(*rapl_pmu), GFP_KERNEL, cpu_to_node(cpu)); -+ if (!rapl_pmu) - return -ENOMEM; - -- raw_spin_lock_init(&pmu->lock); -- INIT_LIST_HEAD(&pmu->active_list); -- pmu->pmu = &rapl_pmus->pmu; -- pmu->timer_interval = ms_to_ktime(rapl_timer_ms); -- rapl_hrtimer_init(pmu); -+ raw_spin_lock_init(&rapl_pmu->lock); -+ INIT_LIST_HEAD(&rapl_pmu->active_list); -+ rapl_pmu->pmu = &rapl_pmus->pmu; -+ rapl_pmu->timer_interval = ms_to_ktime(rapl_timer_ms); -+ rapl_hrtimer_init(rapl_pmu); - -- rapl_pmus->pmus[topology_logical_die_id(cpu)] = pmu; -+ rapl_pmus->rapl_pmu[rapl_pmu_idx] = rapl_pmu; - } - - /* - * Check if there is an online cpu in the package which collects rapl - * events already. - */ -- target = cpumask_any_and(&rapl_cpu_mask, topology_die_cpumask(cpu)); -+ target = cpumask_any_and(&rapl_pmus->cpumask, event_cpumask); - if (target < nr_cpu_ids) - return 0; - -- cpumask_set_cpu(cpu, &rapl_cpu_mask); -- pmu->cpu = cpu; -+ cpumask_set_cpu(cpu, &rapl_pmus->cpumask); -+ rapl_pmu->cpu = cpu; - return 0; - } - --static int rapl_check_hw_unit(struct rapl_model *rm) -+static int rapl_cpu_online(unsigned int cpu) -+{ -+ int ret = __rapl_cpu_online(rapl_pmus_pkg, get_rapl_pmu_idx(cpu), -+ get_rapl_pmu_cpumask(cpu), cpu); -+ -+ if (ret == 0 && rapl_model->core_events) -+ ret = __rapl_cpu_online(rapl_pmus_core, topology_logical_core_id(cpu), -+ topology_sibling_cpumask(cpu), cpu); -+ -+ return ret; -+} -+ -+ -+static int rapl_check_hw_unit(void) - { - u64 msr_rapl_power_unit_bits; - int i; - - /* protect rdmsrl() to handle virtualization */ -- if (rdmsrl_safe(rm->msr_power_unit, &msr_rapl_power_unit_bits)) -+ if (rdmsrl_safe(rapl_model->msr_power_unit, &msr_rapl_power_unit_bits)) - return -1; -- for (i = 0; i < NR_RAPL_DOMAINS; i++) -+ for (i = 0; i < NR_RAPL_PKG_DOMAINS; i++) - rapl_hw_unit[i] = (msr_rapl_power_unit_bits >> 8) & 0x1FULL; - -- switch (rm->unit_quirk) { -+ switch (rapl_model->unit_quirk) { - /* - * DRAM domain on HSW server and KNL has fixed energy unit which can be - * different than the unit from power unit MSR. See -@@ -645,22 +766,29 @@ static void __init rapl_advertise(void) - int i; - - pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms ovfl timer\n", -- hweight32(rapl_cntr_mask), rapl_timer_ms); -+ hweight32(rapl_pkg_cntr_mask) + hweight32(rapl_core_cntr_mask), rapl_timer_ms); - -- for (i = 0; i < NR_RAPL_DOMAINS; i++) { -- if (rapl_cntr_mask & (1 << i)) { -+ for (i = 0; i < NR_RAPL_PKG_DOMAINS; i++) { -+ if (rapl_pkg_cntr_mask & (1 << i)) { - pr_info("hw unit of domain %s 2^-%d Joules\n", -- rapl_domain_names[i], rapl_hw_unit[i]); -+ rapl_pkg_domain_names[i], rapl_hw_unit[i]); -+ } -+ } -+ -+ for (i = 0; i < NR_RAPL_CORE_DOMAINS; i++) { -+ if (rapl_core_cntr_mask & (1 << i)) { -+ pr_info("hw unit of domain %s 2^-%d Joules\n", -+ rapl_core_domain_names[i], rapl_hw_unit[i]); - } - } - } - --static void cleanup_rapl_pmus(void) -+static void cleanup_rapl_pmus(struct rapl_pmus *rapl_pmus) - { - int i; - - for (i = 0; i < rapl_pmus->nr_rapl_pmu; i++) -- kfree(rapl_pmus->pmus[i]); -+ kfree(rapl_pmus->rapl_pmu[i]); - kfree(rapl_pmus); - } - -@@ -673,11 +801,17 @@ static const struct attribute_group *rapl_attr_update[] = { - NULL, - }; - --static int __init init_rapl_pmus(void) -+static const struct attribute_group *rapl_per_core_attr_update[] = { -+ &rapl_events_per_core_group, -+}; -+ -+static int __init init_rapl_pmus(struct rapl_pmus **rapl_pmus_ptr, int nr_rapl_pmu, -+ const struct attribute_group **rapl_attr_groups, -+ const struct attribute_group **rapl_attr_update) - { -- int nr_rapl_pmu = topology_max_packages() * topology_max_dies_per_package(); -+ struct rapl_pmus *rapl_pmus; - -- rapl_pmus = kzalloc(struct_size(rapl_pmus, pmus, nr_rapl_pmu), GFP_KERNEL); -+ rapl_pmus = kzalloc(struct_size(rapl_pmus, rapl_pmu, nr_rapl_pmu), GFP_KERNEL); - if (!rapl_pmus) - return -ENOMEM; - -@@ -693,75 +827,80 @@ static int __init init_rapl_pmus(void) - rapl_pmus->pmu.read = rapl_pmu_event_read; - rapl_pmus->pmu.module = THIS_MODULE; - rapl_pmus->pmu.capabilities = PERF_PMU_CAP_NO_EXCLUDE; -+ -+ *rapl_pmus_ptr = rapl_pmus; -+ - return 0; - } - - static struct rapl_model model_snb = { -- .events = BIT(PERF_RAPL_PP0) | -+ .pkg_events = BIT(PERF_RAPL_PP0) | - BIT(PERF_RAPL_PKG) | - BIT(PERF_RAPL_PP1), - .msr_power_unit = MSR_RAPL_POWER_UNIT, -- .rapl_msrs = intel_rapl_msrs, -+ .rapl_pkg_msrs = intel_rapl_msrs, - }; - - static struct rapl_model model_snbep = { -- .events = BIT(PERF_RAPL_PP0) | -+ .pkg_events = BIT(PERF_RAPL_PP0) | - BIT(PERF_RAPL_PKG) | - BIT(PERF_RAPL_RAM), - .msr_power_unit = MSR_RAPL_POWER_UNIT, -- .rapl_msrs = intel_rapl_msrs, -+ .rapl_pkg_msrs = intel_rapl_msrs, - }; - - static struct rapl_model model_hsw = { -- .events = BIT(PERF_RAPL_PP0) | -+ .pkg_events = BIT(PERF_RAPL_PP0) | - BIT(PERF_RAPL_PKG) | - BIT(PERF_RAPL_RAM) | - BIT(PERF_RAPL_PP1), - .msr_power_unit = MSR_RAPL_POWER_UNIT, -- .rapl_msrs = intel_rapl_msrs, -+ .rapl_pkg_msrs = intel_rapl_msrs, - }; - - static struct rapl_model model_hsx = { -- .events = BIT(PERF_RAPL_PP0) | -+ .pkg_events = BIT(PERF_RAPL_PP0) | - BIT(PERF_RAPL_PKG) | - BIT(PERF_RAPL_RAM), - .unit_quirk = RAPL_UNIT_QUIRK_INTEL_HSW, - .msr_power_unit = MSR_RAPL_POWER_UNIT, -- .rapl_msrs = intel_rapl_msrs, -+ .rapl_pkg_msrs = intel_rapl_msrs, - }; - - static struct rapl_model model_knl = { -- .events = BIT(PERF_RAPL_PKG) | -+ .pkg_events = BIT(PERF_RAPL_PKG) | - BIT(PERF_RAPL_RAM), - .unit_quirk = RAPL_UNIT_QUIRK_INTEL_HSW, - .msr_power_unit = MSR_RAPL_POWER_UNIT, -- .rapl_msrs = intel_rapl_msrs, -+ .rapl_pkg_msrs = intel_rapl_msrs, - }; - - static struct rapl_model model_skl = { -- .events = BIT(PERF_RAPL_PP0) | -+ .pkg_events = BIT(PERF_RAPL_PP0) | - BIT(PERF_RAPL_PKG) | - BIT(PERF_RAPL_RAM) | - BIT(PERF_RAPL_PP1) | - BIT(PERF_RAPL_PSYS), - .msr_power_unit = MSR_RAPL_POWER_UNIT, -- .rapl_msrs = intel_rapl_msrs, -+ .rapl_pkg_msrs = intel_rapl_msrs, - }; - - static struct rapl_model model_spr = { -- .events = BIT(PERF_RAPL_PP0) | -+ .pkg_events = BIT(PERF_RAPL_PP0) | - BIT(PERF_RAPL_PKG) | - BIT(PERF_RAPL_RAM) | - BIT(PERF_RAPL_PSYS), - .unit_quirk = RAPL_UNIT_QUIRK_INTEL_SPR, - .msr_power_unit = MSR_RAPL_POWER_UNIT, -- .rapl_msrs = intel_rapl_spr_msrs, -+ .rapl_pkg_msrs = intel_rapl_spr_msrs, - }; - - static struct rapl_model model_amd_hygon = { -- .events = BIT(PERF_RAPL_PKG), -+ .pkg_events = BIT(PERF_RAPL_PKG), -+ .core_events = BIT(PERF_RAPL_PER_CORE), - .msr_power_unit = MSR_AMD_RAPL_POWER_UNIT, -- .rapl_msrs = amd_rapl_msrs, -+ .rapl_pkg_msrs = amd_rapl_pkg_msrs, -+ .rapl_core_msrs = amd_rapl_core_msrs, - }; - - static const struct x86_cpu_id rapl_model_match[] __initconst = { -@@ -817,28 +956,47 @@ MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); - static int __init rapl_pmu_init(void) - { - const struct x86_cpu_id *id; -- struct rapl_model *rm; - int ret; -+ int nr_rapl_pmu = topology_max_packages() * topology_max_dies_per_package(); -+ int nr_cores = topology_max_packages() * topology_num_cores_per_package(); -+ -+ if (rapl_pmu_is_pkg_scope()) -+ nr_rapl_pmu = topology_max_packages(); - - id = x86_match_cpu(rapl_model_match); - if (!id) - return -ENODEV; - -- rm = (struct rapl_model *) id->driver_data; -- -- rapl_msrs = rm->rapl_msrs; -+ rapl_model = (struct rapl_model *) id->driver_data; - -- rapl_cntr_mask = perf_msr_probe(rapl_msrs, PERF_RAPL_MAX, -- false, (void *) &rm->events); -+ rapl_pkg_cntr_mask = perf_msr_probe(rapl_model->rapl_pkg_msrs, PERF_RAPL_PKG_EVENTS_MAX, -+ false, (void *) &rapl_model->pkg_events); - -- ret = rapl_check_hw_unit(rm); -+ ret = rapl_check_hw_unit(); - if (ret) - return ret; - -- ret = init_rapl_pmus(); -+ ret = init_rapl_pmus(&rapl_pmus_pkg, nr_rapl_pmu, rapl_attr_groups, rapl_attr_update); - if (ret) - return ret; - -+ if (rapl_model->core_events) { -+ rapl_core_cntr_mask = perf_msr_probe(rapl_model->rapl_core_msrs, -+ PERF_RAPL_CORE_EVENTS_MAX, false, -+ (void *) &rapl_model->core_events); -+ -+ ret = init_rapl_pmus(&rapl_pmus_core, nr_cores, -+ rapl_per_core_attr_groups, rapl_per_core_attr_update); -+ if (ret) { -+ /* -+ * If initialization of per_core PMU fails, reset per_core -+ * flag, and continue with power PMU initialization. -+ */ -+ pr_warn("Per-core PMU initialization failed (%d)\n", ret); -+ rapl_model->core_events = 0UL; -+ } -+ } -+ - /* - * Install callbacks. Core will call them for each online cpu. - */ -@@ -848,10 +1006,24 @@ static int __init rapl_pmu_init(void) - if (ret) - goto out; - -- ret = perf_pmu_register(&rapl_pmus->pmu, "power", -1); -+ ret = perf_pmu_register(&rapl_pmus_pkg->pmu, "power", -1); - if (ret) - goto out1; - -+ if (rapl_model->core_events) { -+ ret = perf_pmu_register(&rapl_pmus_core->pmu, "power_per_core", -1); -+ if (ret) { -+ /* -+ * If registration of per_core PMU fails, cleanup per_core PMU -+ * variables, reset the per_core flag and keep the -+ * power PMU untouched. -+ */ -+ pr_warn("Per-core PMU registration failed (%d)\n", ret); -+ cleanup_rapl_pmus(rapl_pmus_core); -+ rapl_model->core_events = 0UL; -+ } -+ } -+ - rapl_advertise(); - return 0; - -@@ -859,7 +1031,7 @@ static int __init rapl_pmu_init(void) - cpuhp_remove_state(CPUHP_AP_PERF_X86_RAPL_ONLINE); - out: - pr_warn("Initialization failed (%d), disabled\n", ret); -- cleanup_rapl_pmus(); -+ cleanup_rapl_pmus(rapl_pmus_pkg); - return ret; - } - module_init(rapl_pmu_init); -@@ -867,7 +1039,11 @@ module_init(rapl_pmu_init); - static void __exit intel_rapl_exit(void) - { - cpuhp_remove_state_nocalls(CPUHP_AP_PERF_X86_RAPL_ONLINE); -- perf_pmu_unregister(&rapl_pmus->pmu); -- cleanup_rapl_pmus(); -+ perf_pmu_unregister(&rapl_pmus_pkg->pmu); -+ cleanup_rapl_pmus(rapl_pmus_pkg); -+ if (rapl_model->core_events) { -+ perf_pmu_unregister(&rapl_pmus_core->pmu); -+ cleanup_rapl_pmus(rapl_pmus_core); -+ } - } - module_exit(intel_rapl_exit); -diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h -index e17f4d733e44..7e53b701bc27 100644 ---- a/arch/x86/include/asm/processor.h -+++ b/arch/x86/include/asm/processor.h -@@ -98,6 +98,7 @@ struct cpuinfo_topology { - // Logical ID mappings - u32 logical_pkg_id; - u32 logical_die_id; -+ u32 logical_core_id; - - // AMD Node ID and Nodes per Package info - u32 amd_node_id; -diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h -index 9f9376db64e3..1c55229efb1e 100644 ---- a/arch/x86/include/asm/topology.h -+++ b/arch/x86/include/asm/topology.h -@@ -143,6 +143,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu); - #define topology_logical_package_id(cpu) (cpu_data(cpu).topo.logical_pkg_id) - #define topology_physical_package_id(cpu) (cpu_data(cpu).topo.pkg_id) - #define topology_logical_die_id(cpu) (cpu_data(cpu).topo.logical_die_id) -+#define topology_logical_core_id(cpu) (cpu_data(cpu).topo.logical_core_id) - #define topology_die_id(cpu) (cpu_data(cpu).topo.die_id) - #define topology_core_id(cpu) (cpu_data(cpu).topo.core_id) - #define topology_ppin(cpu) (cpu_data(cpu).ppin) -diff --git a/arch/x86/kernel/cpu/debugfs.c b/arch/x86/kernel/cpu/debugfs.c -index 10719aba6276..cacfd3f6abef 100644 ---- a/arch/x86/kernel/cpu/debugfs.c -+++ b/arch/x86/kernel/cpu/debugfs.c -@@ -25,6 +25,7 @@ static int cpu_debug_show(struct seq_file *m, void *p) - seq_printf(m, "cpu_type: %s\n", get_topology_cpu_type_name(c)); - seq_printf(m, "logical_pkg_id: %u\n", c->topo.logical_pkg_id); - seq_printf(m, "logical_die_id: %u\n", c->topo.logical_die_id); -+ seq_printf(m, "logical_core_id: %u\n", c->topo.logical_core_id); - seq_printf(m, "llc_id: %u\n", c->topo.llc_id); - seq_printf(m, "l2c_id: %u\n", c->topo.l2c_id); - seq_printf(m, "amd_node_id: %u\n", c->topo.amd_node_id); -diff --git a/arch/x86/kernel/cpu/topology_common.c b/arch/x86/kernel/cpu/topology_common.c -index 8277c64f88db..b5a5e1411469 100644 ---- a/arch/x86/kernel/cpu/topology_common.c -+++ b/arch/x86/kernel/cpu/topology_common.c -@@ -185,6 +185,7 @@ static void topo_set_ids(struct topo_scan *tscan, bool early) - if (!early) { - c->topo.logical_pkg_id = topology_get_logical_id(apicid, TOPO_PKG_DOMAIN); - c->topo.logical_die_id = topology_get_logical_id(apicid, TOPO_DIE_DOMAIN); -+ c->topo.logical_core_id = topology_get_logical_id(apicid, TOPO_CORE_DOMAIN); - } - - /* Package relative core ID */ --- -2.47.0.rc0 - -From 38ca6249d4a3205988323759c2e0986d93e737aa Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:53:29 +0800 -Subject: [PATCH 11/13] t2 - -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- .../ABI/testing/sysfs-driver-hid-appletb-kbd | 13 + Documentation/core-api/printk-formats.rst | 32 + @@ -28630,12 +25968,12 @@ index 4427572b2477..b60c99d61882 100755 last; } -- -2.47.0.rc0 +2.47.0 -From 9c5f8134d6095a520bca8870f2477115b595ca07 Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:53:44 +0800 -Subject: [PATCH 12/13] thp-shrinker +From 7ec11666090bbffb316c27f68c9fbdb613c1a37d Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:16:34 +0100 +Subject: [PATCH 11/12] thp-shrinker Signed-off-by: Peter Jung --- @@ -28692,10 +26030,10 @@ index 058485daf186..02ae7bc9efbd 100644 is incremented every time a PMD split into table of PTEs. This can happen, for instance, when application calls mprotect() or diff --git a/include/linux/huge_mm.h b/include/linux/huge_mm.h -index e25d9ebfdf89..00af84aa88ea 100644 +index 6d334c211176..8f46d73fd401 100644 --- a/include/linux/huge_mm.h +++ b/include/linux/huge_mm.h -@@ -321,7 +321,7 @@ static inline int split_huge_page(struct page *page) +@@ -339,7 +339,7 @@ static inline int split_huge_page(struct page *page) { return split_huge_page_to_list_to_order(page, NULL, 0); } @@ -28704,7 +26042,7 @@ index e25d9ebfdf89..00af84aa88ea 100644 void __split_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd, unsigned long address, bool freeze, struct folio *folio); -@@ -484,7 +484,7 @@ static inline int split_huge_page(struct page *page) +@@ -502,7 +502,7 @@ static inline int split_huge_page(struct page *page) { return 0; } @@ -28796,10 +26134,10 @@ index 747943bc8cc2..d35e588e0ece 100644 THP_SCAN_EXCEED_NONE_PTE, THP_SCAN_EXCEED_SWAP_PTE, diff --git a/mm/huge_memory.c b/mm/huge_memory.c -index 4d2839fcf688..eb2e5c305547 100644 +index e44508e46e89..2b39915598a0 100644 --- a/mm/huge_memory.c +++ b/mm/huge_memory.c -@@ -77,6 +77,7 @@ static unsigned long deferred_split_count(struct shrinker *shrink, +@@ -73,6 +73,7 @@ static unsigned long deferred_split_count(struct shrinker *shrink, struct shrink_control *sc); static unsigned long deferred_split_scan(struct shrinker *shrink, struct shrink_control *sc); @@ -28807,7 +26145,7 @@ index 4d2839fcf688..eb2e5c305547 100644 static atomic_t huge_zero_refcount; struct folio *huge_zero_folio __read_mostly; -@@ -449,6 +450,27 @@ static ssize_t hpage_pmd_size_show(struct kobject *kobj, +@@ -429,6 +430,27 @@ static ssize_t hpage_pmd_size_show(struct kobject *kobj, static struct kobj_attribute hpage_pmd_size_attr = __ATTR_RO(hpage_pmd_size); @@ -28835,7 +26173,7 @@ index 4d2839fcf688..eb2e5c305547 100644 static struct attribute *hugepage_attr[] = { &enabled_attr.attr, &defrag_attr.attr, -@@ -457,6 +479,7 @@ static struct attribute *hugepage_attr[] = { +@@ -437,6 +459,7 @@ static struct attribute *hugepage_attr[] = { #ifdef CONFIG_SHMEM &shmem_enabled_attr.attr, #endif @@ -28843,7 +26181,7 @@ index 4d2839fcf688..eb2e5c305547 100644 NULL, }; -@@ -1013,6 +1036,7 @@ static vm_fault_t __do_huge_pmd_anonymous_page(struct vm_fault *vmf, +@@ -993,6 +1016,7 @@ static vm_fault_t __do_huge_pmd_anonymous_page(struct vm_fault *vmf, update_mmu_cache_pmd(vma, vmf->address, vmf->pmd); add_mm_counter(vma->vm_mm, MM_ANONPAGES, HPAGE_PMD_NR); mm_inc_nr_ptes(vma->vm_mm); @@ -28851,7 +26189,7 @@ index 4d2839fcf688..eb2e5c305547 100644 spin_unlock(vmf->ptl); count_vm_event(THP_FAULT_ALLOC); count_mthp_stat(HPAGE_PMD_ORDER, MTHP_STAT_ANON_FAULT_ALLOC); -@@ -2784,7 +2808,7 @@ bool unmap_huge_pmd_locked(struct vm_area_struct *vma, unsigned long addr, +@@ -2764,7 +2788,7 @@ bool unmap_huge_pmd_locked(struct vm_area_struct *vma, unsigned long addr, return false; } @@ -28860,7 +26198,7 @@ index 4d2839fcf688..eb2e5c305547 100644 { int i = 0; -@@ -2792,7 +2816,7 @@ static void remap_page(struct folio *folio, unsigned long nr) +@@ -2772,7 +2796,7 @@ static void remap_page(struct folio *folio, unsigned long nr) if (!folio_test_anon(folio)) return; for (;;) { @@ -28869,7 +26207,7 @@ index 4d2839fcf688..eb2e5c305547 100644 i += folio_nr_pages(folio); if (i >= nr) break; -@@ -3000,7 +3024,7 @@ static void __split_huge_page(struct page *page, struct list_head *list, +@@ -2980,7 +3004,7 @@ static void __split_huge_page(struct page *page, struct list_head *list, if (nr_dropped) shmem_uncharge(folio->mapping->host, nr_dropped); @@ -28878,7 +26216,7 @@ index 4d2839fcf688..eb2e5c305547 100644 /* * set page to its compound_head when split to non order-0 pages, so -@@ -3235,6 +3259,9 @@ int split_huge_page_to_list_to_order(struct page *page, struct list_head *list, +@@ -3215,6 +3239,9 @@ int split_huge_page_to_list_to_order(struct page *page, struct list_head *list, if (folio_order(folio) > 1 && !list_empty(&folio->_deferred_list)) { ds_queue->split_queue_len--; @@ -28888,7 +26226,7 @@ index 4d2839fcf688..eb2e5c305547 100644 /* * Reinitialize page_deferred_list after removing the * page from the split_queue, otherwise a subsequent -@@ -3269,7 +3296,7 @@ int split_huge_page_to_list_to_order(struct page *page, struct list_head *list, +@@ -3249,7 +3276,7 @@ int split_huge_page_to_list_to_order(struct page *page, struct list_head *list, if (mapping) xas_unlock(&xas); local_irq_enable(); @@ -28897,7 +26235,7 @@ index 4d2839fcf688..eb2e5c305547 100644 ret = -EAGAIN; } -@@ -3297,12 +3324,16 @@ void __folio_undo_large_rmappable(struct folio *folio) +@@ -3277,12 +3304,16 @@ void __folio_undo_large_rmappable(struct folio *folio) spin_lock_irqsave(&ds_queue->split_queue_lock, flags); if (!list_empty(&folio->_deferred_list)) { ds_queue->split_queue_len--; @@ -28915,7 +26253,7 @@ index 4d2839fcf688..eb2e5c305547 100644 { struct deferred_split *ds_queue = get_deferred_split_queue(folio); #ifdef CONFIG_MEMCG -@@ -3317,6 +3348,9 @@ void deferred_split_folio(struct folio *folio) +@@ -3297,6 +3328,9 @@ void deferred_split_folio(struct folio *folio) if (folio_order(folio) <= 1) return; @@ -28925,7 +26263,7 @@ index 4d2839fcf688..eb2e5c305547 100644 /* * The try_to_unmap() in page reclaim path might reach here too, * this may cause a race condition to corrupt deferred split queue. -@@ -3330,14 +3364,20 @@ void deferred_split_folio(struct folio *folio) +@@ -3310,14 +3344,20 @@ void deferred_split_folio(struct folio *folio) if (folio_test_swapcache(folio)) return; @@ -28952,7 +26290,7 @@ index 4d2839fcf688..eb2e5c305547 100644 list_add_tail(&folio->_deferred_list, &ds_queue->split_queue); ds_queue->split_queue_len++; #ifdef CONFIG_MEMCG -@@ -3362,6 +3402,39 @@ static unsigned long deferred_split_count(struct shrinker *shrink, +@@ -3342,6 +3382,39 @@ static unsigned long deferred_split_count(struct shrinker *shrink, return READ_ONCE(ds_queue->split_queue_len); } @@ -28992,7 +26330,7 @@ index 4d2839fcf688..eb2e5c305547 100644 static unsigned long deferred_split_scan(struct shrinker *shrink, struct shrink_control *sc) { -@@ -3369,8 +3442,8 @@ static unsigned long deferred_split_scan(struct shrinker *shrink, +@@ -3349,8 +3422,8 @@ static unsigned long deferred_split_scan(struct shrinker *shrink, struct deferred_split *ds_queue = &pgdata->deferred_split_queue; unsigned long flags; LIST_HEAD(list); @@ -29003,7 +26341,7 @@ index 4d2839fcf688..eb2e5c305547 100644 #ifdef CONFIG_MEMCG if (sc->memcg) -@@ -3385,6 +3458,9 @@ static unsigned long deferred_split_scan(struct shrinker *shrink, +@@ -3365,6 +3438,9 @@ static unsigned long deferred_split_scan(struct shrinker *shrink, list_move(&folio->_deferred_list, &list); } else { /* We lost race with folio_put() */ @@ -29013,7 +26351,7 @@ index 4d2839fcf688..eb2e5c305547 100644 list_del_init(&folio->_deferred_list); ds_queue->split_queue_len--; } -@@ -3394,20 +3470,55 @@ static unsigned long deferred_split_scan(struct shrinker *shrink, +@@ -3374,20 +3450,55 @@ static unsigned long deferred_split_scan(struct shrinker *shrink, spin_unlock_irqrestore(&ds_queue->split_queue_lock, flags); list_for_each_entry_safe(folio, next, &list, _deferred_list) { @@ -29444,14 +26782,14 @@ index 9007c420d52c..2eaed8209925 100644 bool check_huge_file(void *addr, int nr_hpages, uint64_t hpage_size); bool check_huge_shmem(void *addr, int nr_hpages, uint64_t hpage_size); -- -2.47.0.rc0 +2.47.0 -From 6401d4b492055092a6ef1946c026e64ba06cc0ec Mon Sep 17 00:00:00 2001 -From: Eric Naim -Date: Tue, 22 Oct 2024 22:53:58 +0800 -Subject: [PATCH 13/13] zstd +From 683fbaa60b17e0a380f04f8f3f1c5cd0d4095241 Mon Sep 17 00:00:00 2001 +From: Peter Jung +Date: Fri, 1 Nov 2024 09:16:43 +0100 +Subject: [PATCH 12/12] zstd -Signed-off-by: Eric Naim +Signed-off-by: Peter Jung --- include/linux/zstd.h | 2 +- include/linux/zstd_errors.h | 23 +- @@ -48096,4 +45434,5 @@ index f4ed952ed485..7d31518e9d5a 100644 EXPORT_SYMBOL(zstd_reset_dstream); -- -2.47.0.rc0 +2.47.0 +