From 5b2200ea546f9cf05ea69bb4b59add1c3d65f717 Mon Sep 17 00:00:00 2001 From: ferreo Date: Tue, 22 Oct 2024 18:51:06 +0200 Subject: [PATCH] Update patches/0001-cachyos-base-all.patch --- patches/0001-cachyos-base-all.patch | 1027 +++++++++++++++++---------- 1 file changed, 647 insertions(+), 380 deletions(-) diff --git a/patches/0001-cachyos-base-all.patch b/patches/0001-cachyos-base-all.patch index ec70352..3368db0 100644 --- a/patches/0001-cachyos-base-all.patch +++ b/patches/0001-cachyos-base-all.patch @@ -1,9 +1,9 @@ -From d19107dae94b5d3d63245e58e7af1e849285cf7b Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:02:20 +0200 +From 9098cf37fa8cdba73fd27f71e6455f6b65161414 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:51:09 +0800 Subject: [PATCH 01/14] address-masking -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- arch/x86/include/asm/uaccess_64.h | 11 +++++++++++ fs/select.c | 4 +++- @@ -108,14 +108,14 @@ index feeb935a2299..6e489f9e90f1 100644 src_addr = (unsigned long)untagged_addr(str); if (likely(src_addr < max_addr)) { -- -2.47.0.rc0 +2.47.0 -From 00a3bac7b52e5a69c2b26d3eb6d78c65b4b63f83 Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:02:32 +0200 +From c02337bbd9d3afc905a664fd4515f01d81a5b853 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:51:22 +0800 Subject: [PATCH 02/14] amd-cache-optimizer -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- .../sysfs-bus-platform-drivers-amd_x3d_vcache | 14 ++ MAINTAINERS | 8 + @@ -401,25 +401,23 @@ index 000000000000..679613d02b9a +MODULE_DESCRIPTION("AMD 3D V-Cache Performance Optimizer Driver"); +MODULE_LICENSE("GPL"); -- -2.47.0.rc0 +2.47.0 -From 943001c18b149dc43e5bf57f4556c184e8122b48 Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:02:42 +0200 +From 7d73843d2171a47e4934180bf94ad1c6d615fc15 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:51:35 +0800 Subject: [PATCH 03/14] amd-pstate -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- Documentation/admin-guide/pm/amd-pstate.rst | 15 +- - arch/x86/include/asm/cpufeatures.h | 1 + - arch/x86/include/asm/processor.h | 16 +- - arch/x86/kernel/acpi/cppc.c | 202 ++++++++++++++- - arch/x86/kernel/cpu/amd.c | 45 ++-- - arch/x86/kernel/cpu/scattered.c | 1 + + arch/x86/include/asm/processor.h | 3 - + arch/x86/kernel/acpi/cppc.c | 172 ++++++++++++- + arch/x86/kernel/cpu/amd.c | 16 -- drivers/cpufreq/acpi-cpufreq.c | 12 +- drivers/cpufreq/amd-pstate.c | 263 +++++++------------- include/acpi/cppc_acpi.h | 41 ++- - 9 files changed, 372 insertions(+), 224 deletions(-) + 7 files changed, 298 insertions(+), 224 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index d0324d44f548..210a808b74ec 100644 @@ -454,58 +452,29 @@ index d0324d44f548..210a808b74ec 100644 ``energy_performance_available_preferences`` A list of all the supported EPP preferences that could be used for -diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h -index dd4682857c12..cea1ed82aeb4 100644 ---- a/arch/x86/include/asm/cpufeatures.h -+++ b/arch/x86/include/asm/cpufeatures.h -@@ -473,6 +473,7 @@ - #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ - #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ - #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ -+#define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */ - - /* - * BUG word(s) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h -index a75a07f4931f..279edfd36fed 100644 +index a75a07f4931f..775acbdea1a9 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h -@@ -690,9 +690,15 @@ static inline u32 per_cpu_l2c_id(unsigned int cpu) - return per_cpu(cpu_info.topo.l2c_id, cpu); +@@ -691,8 +691,6 @@ static inline u32 per_cpu_l2c_id(unsigned int cpu) } --#ifdef CONFIG_CPU_SUP_AMD + #ifdef CONFIG_CPU_SUP_AMD -extern u32 amd_get_highest_perf(void); -+/* defined by CPUID_Fn80000026_EBX BIT [31:28] */ -+enum amd_core_type { -+ CPU_CORE_TYPE_NO_HETERO_SUP = -1, -+ CPU_CORE_TYPE_PERFORMANCE = 0, -+ CPU_CORE_TYPE_EFFICIENCY = 1, -+ CPU_CORE_TYPE_UNDEFINED = 2, -+}; - -+#ifdef CONFIG_CPU_SUP_AMD +- /* * Issue a DIV 0/1 insn to clear any division data from previous DIV * operations. -@@ -704,10 +710,14 @@ static __always_inline void amd_clear_divider(void) - } +@@ -705,7 +703,6 @@ static __always_inline void amd_clear_divider(void) extern void amd_check_microcode(void); -+extern enum amd_core_type amd_get_core_type(void); #else -static inline u32 amd_get_highest_perf(void) { return 0; } static inline void amd_clear_divider(void) { } static inline void amd_check_microcode(void) { } -+static inline enum amd_core_type amd_get_core_type(void) -+{ -+ return CPU_CORE_TYPE_NO_HETERO_SUP; -+} #endif - - extern unsigned long arch_align_stack(unsigned long sp); diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c -index ff8f25faca3d..ca289e6ec82c 100644 +index ff8f25faca3d..956984054bf3 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -9,6 +9,17 @@ @@ -568,7 +537,7 @@ index ff8f25faca3d..ca289e6ec82c 100644 freq_invariance_set_perf_ratio(perf_ratio, false); } -@@ -116,3 +126,173 @@ void init_freq_invariance_cppc(void) +@@ -116,3 +126,143 @@ void init_freq_invariance_cppc(void) init_done = true; mutex_unlock(&freq_invariance_lock); } @@ -663,12 +632,6 @@ index ff8f25faca3d..ca289e6ec82c 100644 +} +EXPORT_SYMBOL_GPL(amd_detect_prefcore); + -+static void amd_do_get_core_type(void *data) -+{ -+ enum amd_core_type *core_type = data; -+ *core_type = amd_get_core_type(); -+} -+ +/** + * amd_get_boost_ratio_numerator: Get the numerator to use for boost ratio calculation + * @cpu: CPU to get numerator for. @@ -686,9 +649,7 @@ index ff8f25faca3d..ca289e6ec82c 100644 + */ +int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) +{ -+ enum amd_core_type core_type; + bool prefcore; -+ u32 tmp; + int ret; + + ret = amd_detect_prefcore(&prefcore); @@ -715,35 +676,13 @@ index ff8f25faca3d..ca289e6ec82c 100644 + break; + } + } -+ -+ /* detect if running on heterogeneous design */ -+ smp_call_function_single(cpu, amd_do_get_core_type, &core_type, 1); -+ switch (core_type) { -+ case CPU_CORE_TYPE_NO_HETERO_SUP: -+ break; -+ case CPU_CORE_TYPE_PERFORMANCE: -+ /* use the max scale for performance cores */ -+ *numerator = CPPC_HIGHEST_PERF_PERFORMANCE; -+ return 0; -+ case CPU_CORE_TYPE_EFFICIENCY: -+ /* use the highest perf value for efficiency cores */ -+ ret = amd_get_highest_perf(cpu, &tmp); -+ if (ret) -+ return ret; -+ *numerator = tmp; -+ return 0; -+ default: -+ pr_warn("WARNING: Undefined core type %d found\n", core_type); -+ break; -+ } -+ + *numerator = CPPC_HIGHEST_PERF_PREFCORE; + + return 0; +} +EXPORT_SYMBOL_GPL(amd_get_boost_ratio_numerator); diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c -index 1e0fe5f8ab84..8ad5f1385f0e 100644 +index f01b72052f79..fab5caec0b72 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -1190,22 +1190,6 @@ unsigned long amd_get_dr_addr_mask(unsigned int dr) @@ -769,51 +708,6 @@ index 1e0fe5f8ab84..8ad5f1385f0e 100644 static void zenbleed_check_cpu(void *unused) { struct cpuinfo_x86 *c = &cpu_data(smp_processor_id()); -@@ -1220,3 +1204,32 @@ void amd_check_microcode(void) - - on_each_cpu(zenbleed_check_cpu, NULL, 1); - } -+ -+/** -+ * amd_get_core_type - Heterogeneous core type identification -+ * -+ * Returns the CPU type [31:28] (i.e., performance or efficient) of -+ * a CPU in the processor. -+ * -+ * If the processor has no core type support, returns -+ * CPU_CORE_TYPE_NO_HETERO_SUP. -+ */ -+enum amd_core_type amd_get_core_type(void) -+{ -+ struct { -+ u32 num_processors :16, -+ power_efficiency_ranking :8, -+ native_model_id :4, -+ core_type :4; -+ } props; -+ -+ if (!cpu_feature_enabled(X86_FEATURE_HETERO_CORE_TOPOLOGY)) -+ return CPU_CORE_TYPE_NO_HETERO_SUP; -+ -+ cpuid_leaf_reg(0x80000026, CPUID_EBX, &props); -+ if (props.core_type >= CPU_CORE_TYPE_UNDEFINED) -+ return CPU_CORE_TYPE_UNDEFINED; -+ -+ return props.core_type; -+} -+EXPORT_SYMBOL_GPL(amd_get_core_type); -diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c -index c84c30188fdf..3bba55323163 100644 ---- a/arch/x86/kernel/cpu/scattered.c -+++ b/arch/x86/kernel/cpu/scattered.c -@@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = { - { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, - { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, - { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 }, -+ { X86_FEATURE_HETERO_CORE_TOPOLOGY, CPUID_EAX, 30, 0x80000026, 0 }, - { 0, 0, 0, 0, 0 } - }; - diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c index a8ca625a98b8..0f04feb6cafa 100644 --- a/drivers/cpufreq/acpi-cpufreq.c @@ -1459,33 +1353,43 @@ index e1720d930666..76e44e102780 100644 #endif /* !CONFIG_ACPI_CPPC_LIB */ -- -2.47.0.rc0 +2.47.0 -From d26165ef11bbc42603a0530ec1c50ad19222f875 Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:03:33 +0200 +From daabe6ab6f76dcfce8392317af98efdf21759aaf Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 23:38:09 +0800 Subject: [PATCH 04/14] amd-hfi -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- - Documentation/arch/x86/amd-hfi.rst | 115 ++++++ - Documentation/arch/x86/index.rst | 1 + - MAINTAINERS | 9 + - arch/x86/include/asm/cpufeatures.h | 1 + - arch/x86/include/asm/hreset.h | 6 + - arch/x86/include/asm/msr-index.h | 5 + - arch/x86/kernel/cpu/common.c | 15 + - arch/x86/kernel/cpu/scattered.c | 1 + - arch/x86/kernel/process_32.c | 3 + - arch/x86/kernel/process_64.c | 3 + - arch/x86/kernel/smpboot.c | 5 +- - drivers/cpufreq/amd-pstate.c | 6 + - drivers/platform/x86/amd/Kconfig | 1 + - drivers/platform/x86/amd/Makefile | 1 + - drivers/platform/x86/amd/hfi/Kconfig | 21 + - drivers/platform/x86/amd/hfi/Makefile | 7 + - drivers/platform/x86/amd/hfi/hfi.c | 552 ++++++++++++++++++++++++++ - 17 files changed, 750 insertions(+), 2 deletions(-) + Documentation/arch/x86/amd-hfi.rst | 129 ++++++ + Documentation/arch/x86/index.rst | 1 + + MAINTAINERS | 9 + + arch/x86/include/asm/cpu.h | 19 + + arch/x86/include/asm/cpufeatures.h | 4 +- + arch/x86/include/asm/hreset.h | 6 + + arch/x86/include/asm/msr-index.h | 5 + + arch/x86/include/asm/processor.h | 18 + + arch/x86/include/asm/topology.h | 8 + + arch/x86/kernel/acpi/cppc.c | 23 + + arch/x86/kernel/cpu/amd.c | 14 + + arch/x86/kernel/cpu/common.c | 15 + + arch/x86/kernel/cpu/debugfs.c | 1 + + arch/x86/kernel/cpu/intel.c | 18 + + arch/x86/kernel/cpu/scattered.c | 4 +- + arch/x86/kernel/cpu/topology_amd.c | 3 + + arch/x86/kernel/cpu/topology_common.c | 13 + + arch/x86/kernel/process_32.c | 3 + + arch/x86/kernel/process_64.c | 3 + + arch/x86/kernel/smpboot.c | 5 +- + drivers/cpufreq/amd-pstate.c | 8 +- + drivers/platform/x86/amd/Kconfig | 1 + + drivers/platform/x86/amd/Makefile | 1 + + drivers/platform/x86/amd/hfi/Kconfig | 21 + + drivers/platform/x86/amd/hfi/Makefile | 7 + + drivers/platform/x86/amd/hfi/hfi.c | 547 +++++++++++++++++++++++ + tools/arch/x86/include/asm/cpufeatures.h | 2 +- + 27 files changed, 882 insertions(+), 6 deletions(-) create mode 100644 Documentation/arch/x86/amd-hfi.rst create mode 100644 arch/x86/include/asm/hreset.h create mode 100644 drivers/platform/x86/amd/hfi/Kconfig @@ -1494,10 +1398,10 @@ Signed-off-by: Peter Jung diff --git a/Documentation/arch/x86/amd-hfi.rst b/Documentation/arch/x86/amd-hfi.rst new file mode 100644 -index 000000000000..2f0d493135c1 +index 000000000000..b66ff083855f --- /dev/null +++ b/Documentation/arch/x86/amd-hfi.rst -@@ -0,0 +1,115 @@ +@@ -0,0 +1,129 @@ +.. SPDX-License-Identifier: GPL-2.0 + +====================================================================== @@ -1507,6 +1411,7 @@ index 000000000000..2f0d493135c1 +:Copyright: 2024 Advanced Micro Devices, Inc. All Rights Reserved. + +:Author: Perry Yuan ++:Author: Mario Limonciello + +Overview +-------- @@ -1560,6 +1465,8 @@ index 000000000000..2f0d493135c1 +| 2 | I/O bound | Efficient | Lowest | PMCx044 | ++----------+----------------+-------------------------------+---------------------+---------+ + ++Thread classification is performed by the hardware each time that the thread is switched out. ++Threads that don't meet any hardware specified criteria will be classified as "default". + +AMD Hardware Feedback Interface +-------------------------------- @@ -1605,6 +1512,17 @@ index 000000000000..2f0d493135c1 + the thread is not on its ideal processor, the OS will then consider scheduling + the thread on its ideal processor (if available). + ++Ranking Table ++------------- ++The ranking table is a shared memory region that is used to communicate the ++performance and energy efficiency capabilities of each CPU in the system. ++ ++The ranking table design includes rankings for each APIC ID in the system and ++rankings both for performance and efficiency for each workload classification. ++ ++.. kernel-doc:: drivers/platform/x86/amd/hfi/hfi.c ++ :doc: amd_shmem_info ++ +Ranking Table update +--------------------------- +The power management firmware issues an platform interrupt after updating the ranking @@ -1642,15 +1560,55 @@ index 2ba00c0cd701..c27b4e8f2129 100644 AMD IOMMU (AMD-VI) M: Joerg Roedel R: Suravee Suthikulpanit +diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h +index aa30fd8cad7f..ca1f5141824d 100644 +--- a/arch/x86/include/asm/cpu.h ++++ b/arch/x86/include/asm/cpu.h +@@ -32,6 +32,8 @@ extern bool handle_user_split_lock(struct pt_regs *regs, long error_code); + extern bool handle_guest_split_lock(unsigned long ip); + extern void handle_bus_lock(struct pt_regs *regs); + u8 get_this_hybrid_cpu_type(void); ++u32 intel_native_model_id(struct cpuinfo_x86 *c); ++enum x86_topology_cpu_type intel_cpu_type(struct cpuinfo_x86 *c); + #else + static inline void __init sld_setup(struct cpuinfo_x86 *c) {} + static inline bool handle_user_split_lock(struct pt_regs *regs, long error_code) +@@ -50,6 +52,23 @@ static inline u8 get_this_hybrid_cpu_type(void) + { + return 0; + } ++ ++static u32 intel_native_model_id(struct cpuinfo_x86 *c) ++{ ++ return 0; ++} ++static enum x86_topology_cpu_type intel_cpu_type(struct cpuinfo_x86 *c) ++{ ++ return TOPO_CPU_TYPE_UNKNOWN; ++} ++#endif ++#ifdef CONFIG_CPU_SUP_AMD ++enum x86_topology_cpu_type amd_cpu_type(struct cpuinfo_x86 *c); ++#else ++static inline enum x86_topology_cpu_type amd_cpu_type(struct cpuinfo_x86 *c) ++{ ++ return TOPO_CPU_TYPE_UNKNOWN; ++} + #endif + #ifdef CONFIG_IA32_FEAT_CTL + void init_ia32_feat_ctl(struct cpuinfo_x86 *c); diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h -index cea1ed82aeb4..3e8e67b8ec7a 100644 +index 913fd3a7bac6..c18dcf608526 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h -@@ -474,6 +474,7 @@ +@@ -473,7 +473,9 @@ + #define X86_FEATURE_BHI_CTRL (21*32+ 2) /* BHI_DIS_S HW control available */ + #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ - #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ - #define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */ -+#define X86_FEATURE_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */ +-#define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ ++#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */ ++#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */ ++#define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */ /* * BUG word(s) @@ -1682,8 +1640,135 @@ index 82c6a4d350e0..a70c1475725a 100644 /* AMD Last Branch Record MSRs */ #define MSR_AMD64_LBR_SELECT 0xc000010e +diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h +index 775acbdea1a9..9a28b11d0327 100644 +--- a/arch/x86/include/asm/processor.h ++++ b/arch/x86/include/asm/processor.h +@@ -105,6 +105,24 @@ struct cpuinfo_topology { + // Cache level topology IDs + u32 llc_id; + u32 l2c_id; ++ ++ // Hardware defined CPU-type ++ union { ++ u32 cpu_type; ++ struct { ++ // CPUID.1A.EAX[23-0] ++ u32 intel_native_model_id:24; ++ // CPUID.1A.EAX[31-24] ++ u32 intel_type:8; ++ }; ++ struct { ++ // CPUID 0x80000026.EBX ++ u32 amd_num_processors :16, ++ amd_power_efficiency_ranking :8, ++ amd_native_model_id :4, ++ amd_type :4; ++ }; ++ }; + }; + + struct cpuinfo_x86 { +diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h +index abe3a8f22cbd..70ec19877f6e 100644 +--- a/arch/x86/include/asm/topology.h ++++ b/arch/x86/include/asm/topology.h +@@ -114,6 +114,12 @@ enum x86_topology_domains { + TOPO_MAX_DOMAIN, + }; + ++enum x86_topology_cpu_type { ++ TOPO_CPU_TYPE_PERFORMANCE, ++ TOPO_CPU_TYPE_EFFICIENCY, ++ TOPO_CPU_TYPE_UNKNOWN, ++}; ++ + struct x86_topology_system { + unsigned int dom_shifts[TOPO_MAX_DOMAIN]; + unsigned int dom_size[TOPO_MAX_DOMAIN]; +@@ -149,6 +155,8 @@ extern unsigned int __max_threads_per_core; + extern unsigned int __num_threads_per_package; + extern unsigned int __num_cores_per_package; + ++enum x86_topology_cpu_type topology_cpu_type(struct cpuinfo_x86 *c); ++ + static inline unsigned int topology_max_packages(void) + { + return __max_logical_packages; +diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c +index 956984054bf3..4fd007eac0c7 100644 +--- a/arch/x86/kernel/acpi/cppc.c ++++ b/arch/x86/kernel/acpi/cppc.c +@@ -234,8 +234,10 @@ EXPORT_SYMBOL_GPL(amd_detect_prefcore); + */ + int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) + { ++ enum x86_topology_cpu_type core_type = topology_cpu_type(&cpu_data(cpu)); + bool prefcore; + int ret; ++ u32 tmp; + + ret = amd_detect_prefcore(&prefcore); + if (ret) +@@ -261,6 +263,27 @@ int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) + break; + } + } ++ ++ /* detect if running on heterogeneous design */ ++ switch (core_type) { ++ case TOPO_CPU_TYPE_UNKNOWN: ++ break; ++ case TOPO_CPU_TYPE_PERFORMANCE: ++ /* use the max scale for performance cores */ ++ *numerator = CPPC_HIGHEST_PERF_PERFORMANCE; ++ return 0; ++ case TOPO_CPU_TYPE_EFFICIENCY: ++ /* use the highest perf value for efficiency cores */ ++ ret = amd_get_highest_perf(cpu, &tmp); ++ if (ret) ++ return ret; ++ *numerator = tmp; ++ return 0; ++ default: ++ pr_warn("WARNING: Undefined core type %d found\n", core_type); ++ break; ++ } ++ + *numerator = CPPC_HIGHEST_PERF_PREFCORE; + + return 0; +diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c +index fab5caec0b72..779073e5a646 100644 +--- a/arch/x86/kernel/cpu/amd.c ++++ b/arch/x86/kernel/cpu/amd.c +@@ -29,6 +29,9 @@ + + #include "cpu.h" + ++#define TOPO_HW_CPU_TYPE_AMD_PERFORMANCE 0 ++#define TOPO_HW_CPU_TYPE_AMD_EFFICIENCY 1 ++ + static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) + { + u32 gprs[8] = { 0 }; +@@ -1205,3 +1208,14 @@ void amd_check_microcode(void) + if (cpu_feature_enabled(X86_FEATURE_ZEN2)) + on_each_cpu(zenbleed_check_cpu, NULL, 1); + } ++ ++enum x86_topology_cpu_type amd_cpu_type(struct cpuinfo_x86 *c) ++{ ++ switch (c->topo.amd_type) { ++ case TOPO_HW_CPU_TYPE_AMD_PERFORMANCE: ++ return TOPO_CPU_TYPE_PERFORMANCE; ++ case TOPO_HW_CPU_TYPE_AMD_EFFICIENCY: ++ return TOPO_CPU_TYPE_EFFICIENCY; ++ } ++ return TOPO_CPU_TYPE_UNKNOWN; ++} diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c -index be307c9ef263..59907fc6849f 100644 +index ab0e2da7c9ef..e73e0e3beee9 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -57,6 +57,7 @@ @@ -1708,14 +1793,14 @@ index be307c9ef263..59907fc6849f 100644 +static void __init setup_hreset(struct cpuinfo_x86 *c) +{ -+ if (cpu_feature_enabled(X86_FEATURE_WORKLOAD_CLASS)) ++ if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS)) + static_key_enable_cpuslocked(&hardware_history_features.key); +} + /* * Once CPU feature detection is finished (and boot params have been * parsed), record any of the sensitive CR bits that are set, and -@@ -1839,6 +1847,7 @@ static void identify_cpu(struct cpuinfo_x86 *c) +@@ -1842,6 +1850,7 @@ static void identify_cpu(struct cpuinfo_x86 *c) setup_smep(c); setup_smap(c); setup_umip(c); @@ -1723,7 +1808,7 @@ index be307c9ef263..59907fc6849f 100644 /* Enable FSGSBASE instructions if available. */ if (cpu_has(c, X86_FEATURE_FSGSBASE)) { -@@ -2392,3 +2401,9 @@ void __init arch_cpu_finalize_init(void) +@@ -2395,3 +2404,9 @@ void __init arch_cpu_finalize_init(void) */ mem_encrypt_init(); } @@ -1733,18 +1818,124 @@ index be307c9ef263..59907fc6849f 100644 + if (static_branch_unlikely(&hardware_history_features)) + wrmsrl(AMD_WORKLOAD_HRST, 0x1); +} +diff --git a/arch/x86/kernel/cpu/debugfs.c b/arch/x86/kernel/cpu/debugfs.c +index 3baf3e435834..c3361e496df9 100644 +--- a/arch/x86/kernel/cpu/debugfs.c ++++ b/arch/x86/kernel/cpu/debugfs.c +@@ -22,6 +22,7 @@ static int cpu_debug_show(struct seq_file *m, void *p) + seq_printf(m, "die_id: %u\n", c->topo.die_id); + seq_printf(m, "cu_id: %u\n", c->topo.cu_id); + seq_printf(m, "core_id: %u\n", c->topo.core_id); ++ seq_printf(m, "cpu_type: %u\n", topology_cpu_type(c)); + seq_printf(m, "logical_pkg_id: %u\n", c->topo.logical_pkg_id); + seq_printf(m, "logical_die_id: %u\n", c->topo.logical_die_id); + seq_printf(m, "llc_id: %u\n", c->topo.llc_id); +diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c +index 08b95a35b5cb..33ee44829603 100644 +--- a/arch/x86/kernel/cpu/intel.c ++++ b/arch/x86/kernel/cpu/intel.c +@@ -1283,6 +1283,8 @@ void __init sld_setup(struct cpuinfo_x86 *c) + } + + #define X86_HYBRID_CPU_TYPE_ID_SHIFT 24 ++#define TOPO_HW_CPU_TYPE_INTEL_ATOM 0x20 ++#define TOPO_HW_CPU_TYPE_INTEL_CORE 0x40 + + /** + * get_this_hybrid_cpu_type() - Get the type of this hybrid CPU +@@ -1297,3 +1299,19 @@ u8 get_this_hybrid_cpu_type(void) + + return cpuid_eax(0x0000001a) >> X86_HYBRID_CPU_TYPE_ID_SHIFT; + } ++ ++u32 intel_native_model_id(struct cpuinfo_x86 *c) ++{ ++ return c->topo.intel_native_model_id; ++} ++ ++enum x86_topology_cpu_type intel_cpu_type(struct cpuinfo_x86 *c) ++{ ++ switch (c->topo.intel_type) { ++ case TOPO_HW_CPU_TYPE_INTEL_ATOM: ++ return TOPO_CPU_TYPE_EFFICIENCY; ++ case TOPO_HW_CPU_TYPE_INTEL_CORE: ++ return TOPO_CPU_TYPE_PERFORMANCE; ++ } ++ return TOPO_CPU_TYPE_UNKNOWN; ++} diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c -index 3bba55323163..b6547bab9e23 100644 +index c84c30188fdf..1e5433259444 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c -@@ -49,6 +49,7 @@ static const struct cpuid_bit cpuid_bits[] = { +@@ -45,13 +45,15 @@ static const struct cpuid_bit cpuid_bits[] = { + { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, + { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, + { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, +- { X86_FEATURE_FAST_CPPC, CPUID_EDX, 15, 0x80000007, 0 }, ++ { X86_FEATURE_AMD_FAST_CPPC, CPUID_EDX, 15, 0x80000007, 0 }, { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, -+ { X86_FEATURE_WORKLOAD_CLASS, CPUID_EAX, 22, 0x80000021, 0 }, ++ { X86_FEATURE_AMD_WORKLOAD_CLASS, CPUID_EAX, 22, 0x80000021, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 }, ++ { X86_FEATURE_AMD_HETEROGENEOUS_CORES, CPUID_EAX, 30, 0x80000026, 0 }, + { 0, 0, 0, 0, 0 } + }; + +diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topology_amd.c +index 7d476fa697ca..03b3c9c3a45e 100644 +--- a/arch/x86/kernel/cpu/topology_amd.c ++++ b/arch/x86/kernel/cpu/topology_amd.c +@@ -182,6 +182,9 @@ static void parse_topology_amd(struct topo_scan *tscan) + if (cpu_feature_enabled(X86_FEATURE_TOPOEXT)) + has_topoext = cpu_parse_topology_ext(tscan); + ++ if (cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES)) ++ tscan->c->topo.cpu_type = cpuid_ebx(0x80000026); ++ + if (!has_topoext && !parse_8000_0008(tscan)) + return; + +diff --git a/arch/x86/kernel/cpu/topology_common.c b/arch/x86/kernel/cpu/topology_common.c +index 9a6069e7133c..04b012dffa47 100644 +--- a/arch/x86/kernel/cpu/topology_common.c ++++ b/arch/x86/kernel/cpu/topology_common.c +@@ -27,6 +27,16 @@ void topology_set_dom(struct topo_scan *tscan, enum x86_topology_domains dom, + } + } + ++enum x86_topology_cpu_type topology_cpu_type(struct cpuinfo_x86 *c) ++{ ++ if (c->x86_vendor == X86_VENDOR_INTEL) ++ return intel_cpu_type(c); ++ if (c->x86_vendor == X86_VENDOR_AMD) ++ return amd_cpu_type(c); ++ ++ return TOPO_CPU_TYPE_UNKNOWN; ++} ++ + static unsigned int __maybe_unused parse_num_cores_legacy(struct cpuinfo_x86 *c) + { + struct { +@@ -87,6 +97,7 @@ static void parse_topology(struct topo_scan *tscan, bool early) + .cu_id = 0xff, + .llc_id = BAD_APICID, + .l2c_id = BAD_APICID, ++ .cpu_type = TOPO_CPU_TYPE_UNKNOWN, + }; + struct cpuinfo_x86 *c = tscan->c; + struct { +@@ -132,6 +143,8 @@ static void parse_topology(struct topo_scan *tscan, bool early) + case X86_VENDOR_INTEL: + if (!IS_ENABLED(CONFIG_CPU_SUP_INTEL) || !cpu_parse_topology_ext(tscan)) + parse_legacy(tscan); ++ if (c->cpuid_level >= 0x1a) ++ c->topo.cpu_type = cpuid_eax(0x1a); + break; + case X86_VENDOR_HYGON: + if (IS_ENABLED(CONFIG_CPU_SUP_HYGON)) diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index 0917c7f25720..6a3a1339f7a7 100644 --- a/arch/x86/kernel/process_32.c @@ -1788,7 +1979,7 @@ index d8d582b750d4..53e3756384d6 100644 } diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c -index 390e4fe7433e..9963ac376523 100644 +index 390e4fe7433e..9ee84f58f3b4 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -497,8 +497,9 @@ static int x86_cluster_flags(void) @@ -1798,13 +1989,13 @@ index 390e4fe7433e..9963ac376523 100644 - if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU)) - return x86_sched_itmt_flags(); + if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU) || -+ cpu_feature_enabled(X86_FEATURE_HETERO_CORE_TOPOLOGY)) ++ cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES)) + return x86_sched_itmt_flags(); return 0; } diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c -index 41965c49ec96..0f9743ba10ab 100644 +index 41965c49ec96..b8709ccb1f26 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -781,6 +781,12 @@ static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata) @@ -1812,7 +2003,7 @@ index 41965c49ec96..0f9743ba10ab 100644 if (!amd_pstate_prefcore) return; + /* should use amd-hfi instead */ -+ if (boot_cpu_has(X86_FEATURE_WORKLOAD_CLASS) && ++ if (boot_cpu_has(X86_FEATURE_AMD_WORKLOAD_CLASS) && + IS_ENABLED(CONFIG_AMD_HFI)) { + amd_pstate_prefcore = false; + return; @@ -1820,6 +2011,15 @@ index 41965c49ec96..0f9743ba10ab 100644 cpudata->hw_prefcore = true; +@@ -838,7 +844,7 @@ static u32 amd_pstate_get_transition_delay_us(unsigned int cpu) + + transition_delay_ns = cppc_get_transition_latency(cpu); + if (transition_delay_ns == CPUFREQ_ETERNAL) { +- if (cpu_feature_enabled(X86_FEATURE_FAST_CPPC)) ++ if (cpu_feature_enabled(X86_FEATURE_AMD_FAST_CPPC)) + return AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY; + else + return AMD_PSTATE_TRANSITION_DELAY; diff --git a/drivers/platform/x86/amd/Kconfig b/drivers/platform/x86/amd/Kconfig index d73f691020d0..0e5eb064116d 100644 --- a/drivers/platform/x86/amd/Kconfig @@ -1883,10 +2083,10 @@ index 000000000000..672c6ac106e9 +amd_hfi-objs := hfi.o diff --git a/drivers/platform/x86/amd/hfi/hfi.c b/drivers/platform/x86/amd/hfi/hfi.c new file mode 100644 -index 000000000000..6df80f6ac73c +index 000000000000..839007684b04 --- /dev/null +++ b/drivers/platform/x86/amd/hfi/hfi.c -@@ -0,0 +1,552 @@ +@@ -0,0 +1,547 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * AMD Hardware Feedback Interface Driver @@ -1933,11 +2133,7 @@ index 000000000000..6df80f6ac73c +/** + * struct amd_shmem_info - Shared memory table for AMD HFI + * -+ * @signature: The PCC signature. The signature of a subspace is computed by -+ * a bitwise of the value 0x50434300 with the subspace ID. -+ * @flags: Notify on completion -+ * @length: Length of payload being transmitted including command field -+ * @command: Command being sent over the subspace ++ * @header: The PCCT table header including signature, length flags and command. + * @version_number: Version number of the table + * @n_logical_processors: Number of logical processors + * @n_capabilities: Number of ranking dimensions (performance, efficiency, etc) @@ -2193,7 +2389,7 @@ index 000000000000..6df80f6ac73c + + ret = amd_hfi_set_state(cpu, true); + if (ret) -+ pr_err("WCT enable failed for cpu %d\n", cpu); ++ pr_err("WCT enable failed for CPU %d\n", cpu); + + return ret; +} @@ -2302,10 +2498,9 @@ index 000000000000..6df80f6ac73c + for_each_present_cpu(cpu) { + struct amd_hfi_cpuinfo *hfi_cpuinfo = per_cpu_ptr(&amd_hfi_cpuinfo, cpu); + -+ seq_printf(s, "%d\t", cpu); ++ seq_printf(s, "%d", cpu); + for (idx = 0; idx < hfi_cpuinfo->nr_class; idx++) { -+ seq_printf(s, "%s%d\t%d\t%d\n", -+ idx == 0 ? "" : "\t", ++ seq_printf(s, "\t%d\t%d\t%d\n", + idx, + hfi_cpuinfo->amd_hfi_classes[idx].perf, + hfi_cpuinfo->amd_hfi_classes[idx].eff); @@ -2320,7 +2515,7 @@ index 000000000000..6df80f6ac73c +{ + int ret, cpu; + -+ for_each_present_cpu(cpu) { ++ for_each_online_cpu(cpu) { + ret = amd_hfi_set_state(cpu, true); + if (ret < 0) { + dev_err(dev, "failed to enable workload class config: %d\n", ret); @@ -2335,7 +2530,7 @@ index 000000000000..6df80f6ac73c +{ + int ret, cpu; + -+ for_each_present_cpu(cpu) { ++ for_each_online_cpu(cpu) { + ret = amd_hfi_set_state(cpu, false); + if (ret < 0) { + dev_err(dev, "failed to disable workload class config: %d\n", ret); @@ -2404,7 +2599,7 @@ index 000000000000..6df80f6ac73c + .acpi_match_table = ACPI_PTR(amd_hfi_platform_match), + }, + .probe = amd_hfi_probe, -+ .remove_new = amd_hfi_remove, ++ .remove = amd_hfi_remove, +}; + +static int __init amd_hfi_init(void) @@ -2412,8 +2607,8 @@ index 000000000000..6df80f6ac73c + int ret; + + if (acpi_disabled || -+ !boot_cpu_has(X86_FEATURE_HETERO_CORE_TOPOLOGY) || -+ !boot_cpu_has(X86_FEATURE_WORKLOAD_CLASS)) ++ !boot_cpu_has(X86_FEATURE_AMD_HETEROGENEOUS_CORES) || ++ !boot_cpu_has(X86_FEATURE_AMD_WORKLOAD_CLASS)) + return -ENODEV; + + device = platform_device_register_simple(AMD_HFI_DRIVER, -1, NULL, 0); @@ -2439,15 +2634,28 @@ index 000000000000..6df80f6ac73c + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("AMD Hardware Feedback Interface Driver"); +diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h +index dd4682857c12..23698d0f4bb4 100644 +--- a/tools/arch/x86/include/asm/cpufeatures.h ++++ b/tools/arch/x86/include/asm/cpufeatures.h +@@ -472,7 +472,7 @@ + #define X86_FEATURE_BHI_CTRL (21*32+ 2) /* BHI_DIS_S HW control available */ + #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ + #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ +-#define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ ++#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ + + /* + * BUG word(s) -- -2.47.0.rc0 +2.47.0 -From 7cf8ae09aff45db05ea4618ab67a94411add263c Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:03:48 +0200 +From d9e873c5996dc87c29ce0ff7e954c472ccd2a369 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:52:00 +0800 Subject: [PATCH 05/14] bbr3 -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- include/linux/tcp.h | 4 +- include/net/inet_connection_sock.h | 4 +- @@ -5623,7 +5831,7 @@ index a19a9dbd3409..e0ef8406a326 100644 const struct tcp_congestion_ops *ca; diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c -index 16c48df8df4c..6c3a1895238e 100644 +index 8f67eea34779..f497c6c4a609 100644 --- a/net/ipv4/tcp_output.c +++ b/net/ipv4/tcp_output.c @@ -336,10 +336,9 @@ static void tcp_ecn_send_syn(struct sock *sk, struct sk_buff *skb) @@ -5717,7 +5925,7 @@ index 16c48df8df4c..6c3a1895238e 100644 return min_t(u32, tso_segs, sk->sk_gso_max_segs); } -@@ -2767,6 +2793,7 @@ static bool tcp_write_xmit(struct sock *sk, unsigned int mss_now, int nonagle, +@@ -2765,6 +2791,7 @@ static bool tcp_write_xmit(struct sock *sk, unsigned int mss_now, int nonagle, skb_set_delivery_time(skb, tp->tcp_wstamp_ns, SKB_CLOCK_MONOTONIC); list_move_tail(&skb->tcp_tsorted_anchor, &tp->tsorted_sent_queue); tcp_init_tso_segs(skb, mss_now); @@ -5725,7 +5933,7 @@ index 16c48df8df4c..6c3a1895238e 100644 goto repair; /* Skip network transmission */ } -@@ -2981,6 +3008,7 @@ void tcp_send_loss_probe(struct sock *sk) +@@ -2979,6 +3006,7 @@ void tcp_send_loss_probe(struct sock *sk) if (WARN_ON(!skb || !tcp_skb_pcount(skb))) goto rearm_timer; @@ -5826,14 +6034,14 @@ index 4d40615dc8fc..f27941201ef2 100644 event = icsk->icsk_pending; -- -2.47.0.rc0 +2.47.0 -From f623d7c10eb37781bcac491a7910c9b571c3e05a Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:03:58 +0200 +From e2a88c9b335a7475b66634f053b128500467c4f6 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:52:15 +0800 Subject: [PATCH 06/14] cachy -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- .../admin-guide/kernel-parameters.txt | 12 + Makefile | 8 + @@ -5934,7 +6142,7 @@ index be010fec7654..900113802ffc 100644 Safety option to keep boot IRQs enabled. This should never be necessary. diff --git a/Makefile b/Makefile -index 50c615983e44..0ae8b28f1046 100644 +index 687ce7aee67a..7c3cbfb2f6b5 100644 --- a/Makefile +++ b/Makefile @@ -803,11 +803,19 @@ KBUILD_CFLAGS += -fno-delete-null-pointer-checks @@ -7012,7 +7220,7 @@ index d5d6ab484e5a..dccba7bcdf97 100644 } diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c -index 2cf951184561..1a53bf05f8fc 100644 +index 87672ca714de..21442469791c 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -2762,7 +2762,10 @@ int smu_get_power_limit(void *handle, @@ -12695,7 +12903,7 @@ index bd5183dfd879..3a410f53a07c 100644 /* diff --git a/mm/vmscan.c b/mm/vmscan.c -index bd489c1af228..47065ea3c47b 100644 +index 128f307da6ee..35b67785907b 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c @@ -199,7 +199,11 @@ struct scan_control { @@ -12854,22 +13062,19 @@ index 663ce300dd06..f83493838cf9 100644 eval "package_$_p() { $(declare -f "_package${_p#$pkgbase}") -- -2.47.0.rc0 +2.47.0 -From c094e7c9e3dfae9733aa8ab22ed230f07d975c5f Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:04:15 +0200 +From 894d9efe4bf547f1fa1df4dd3662986743ec57d3 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:52:25 +0800 Subject: [PATCH 07/14] fixes -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- arch/Kconfig | 4 +- - arch/x86/kernel/apic/apic.c | 14 +++++- - arch/x86/kernel/cpu/amd.c | 3 +- drivers/bluetooth/btusb.c | 4 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 ++ - drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +- - drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 15 ++++-- + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 10 +++- drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 3 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h | 2 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h | 2 +- @@ -12883,16 +13088,22 @@ Signed-off-by: Peter Jung .../gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c | 2 +- .../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 15 +++--- .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 34 +++++++++---- - .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 25 +++++----- + .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 3 +- .../drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c | 22 +++++---- .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 15 +++--- .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 +- .../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 36 ++++++++------ .../gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c | 33 +++++++++---- .../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 3 +- + drivers/gpu/drm/drm_edid.c | 47 ++++++++++++++++-- drivers/net/wireless/realtek/rtw89/pci.c | 48 ++++++++++++++++--- + drivers/platform/x86/dell/dell-wmi-base.c | 9 ++++ + mm/mmap.c | 4 -- mm/shrinker.c | 4 +- - 29 files changed, 244 insertions(+), 119 deletions(-) + net/netfilter/xt_NFLOG.c | 2 +- + net/netfilter/xt_TRACE.c | 1 + + net/netfilter/xt_mark.c | 2 +- + 32 files changed, 269 insertions(+), 110 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 975dd22a2dbd..de69b8f5b5be 100644 @@ -12916,47 +13127,8 @@ index 975dd22a2dbd..de69b8f5b5be 100644 depends on HAVE_ARCH_MMAP_RND_COMPAT_BITS help This value can be used to select the number of bits to use to -diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c -index 373638691cd4..81089f99576c 100644 ---- a/arch/x86/kernel/apic/apic.c -+++ b/arch/x86/kernel/apic/apic.c -@@ -440,7 +440,19 @@ static int lapic_timer_shutdown(struct clock_event_device *evt) - v = apic_read(APIC_LVTT); - v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); - apic_write(APIC_LVTT, v); -- apic_write(APIC_TMICT, 0); -+ -+ /* -+ * Setting APIC_LVT_MASKED should be enough to tell the -+ * hardware that this timer will never fire. But AMD -+ * erratum 411 and some Intel CPU behavior circa 2024 -+ * say otherwise. Time for belt and suspenders programming, -+ * mask the timer and zero the counter registers: -+ */ -+ if (v & APIC_LVT_TIMER_TSCDEADLINE) -+ wrmsrl(MSR_IA32_TSC_DEADLINE, 0); -+ else -+ apic_write(APIC_TMICT, 0); -+ - return 0; - } - -diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c -index 8ad5f1385f0e..353e5b8cad34 100644 ---- a/arch/x86/kernel/cpu/amd.c -+++ b/arch/x86/kernel/cpu/amd.c -@@ -1202,7 +1202,8 @@ void amd_check_microcode(void) - if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) - return; - -- on_each_cpu(zenbleed_check_cpu, NULL, 1); -+ if (boot_cpu_has(X86_FEATURE_ZEN2)) -+ on_each_cpu(zenbleed_check_cpu, NULL, 1); - } - - /** diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c -index a1e9b052bc84..447905a5cf1d 100644 +index 2408e50743ca..73c54e92afa9 100644 --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c @@ -692,6 +692,10 @@ static const struct usb_device_id quirks_table[] = { @@ -12986,24 +13158,8 @@ index 9c3b7b027485..ad5c05ee92f3 100644 /* let modprobe override vga console setting */ return pci_register_driver(&amdgpu_kms_pci_driver); -diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c -index 1bb602c4f9b3..00df025a8636 100644 ---- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c -@@ -4711,7 +4711,10 @@ static int gfx_v10_0_sw_init(void *handle) - case IP_VERSION(10, 3, 3): - case IP_VERSION(10, 3, 7): - adev->gfx.me.num_me = 1; -- adev->gfx.me.num_pipe_per_me = 2; -+ if (amdgpu_sriov_vf(adev)) -+ adev->gfx.me.num_pipe_per_me = 2; -+ else -+ adev->gfx.me.num_pipe_per_me = 1; - adev->gfx.me.num_queue_per_pipe = 1; - adev->gfx.mec.num_mec = 2; - adev->gfx.mec.num_pipe_per_mec = 4; diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c -index 1a53bf05f8fc..f1f69911e8ce 100644 +index 21442469791c..18eaab929540 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -140,7 +140,8 @@ int smu_set_soft_freq_range(struct smu_context *smu, @@ -13024,11 +13180,12 @@ index 1a53bf05f8fc..f1f69911e8ce 100644 smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0; smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D] = 1; smu->workload_prority[PP_SMC_POWER_PROFILE_POWERSAVING] = 2; -@@ -1266,6 +1266,11 @@ static int smu_sw_init(void *handle) +@@ -1266,6 +1266,12 @@ static int smu_sw_init(void *handle) smu->workload_prority[PP_SMC_POWER_PROFILE_COMPUTE] = 5; smu->workload_prority[PP_SMC_POWER_PROFILE_CUSTOM] = 6; -+ if (smu->is_apu) ++ if (smu->is_apu || ++ (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 1))) + smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT]; + else + smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D]; @@ -13036,33 +13193,6 @@ index 1a53bf05f8fc..f1f69911e8ce 100644 smu->workload_setting[0] = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; smu->workload_setting[1] = PP_SMC_POWER_PROFILE_FULLSCREEN3D; smu->workload_setting[2] = PP_SMC_POWER_PROFILE_POWERSAVING; -@@ -2226,7 +2231,7 @@ static int smu_bump_power_profile_mode(struct smu_context *smu, - static int smu_adjust_power_state_dynamic(struct smu_context *smu, - enum amd_dpm_forced_level level, - bool skip_display_settings, -- bool force_update) -+ bool init) - { - int ret = 0; - int index = 0; -@@ -2255,7 +2260,7 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu, - } - } - -- if (force_update || smu_dpm_ctx->dpm_level != level) { -+ if (smu_dpm_ctx->dpm_level != level) { - ret = smu_asic_set_performance_level(smu, level); - if (ret) { - dev_err(smu->adev->dev, "Failed to set performance level!"); -@@ -2272,7 +2277,7 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu, - index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0; - workload[0] = smu->workload_setting[index]; - -- if (force_update || smu->power_profile_mode != workload[0]) -+ if (init || smu->power_profile_mode != workload[0]) - smu_bump_power_profile_mode(smu, workload, 0); - } - diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h index b44a185d07e8..5eb4e5c75981 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h @@ -13564,7 +13694,7 @@ index e17466cc1952..6cfd66363915 100644 return ret; diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c -index 1d024b122b0c..f69fe75352de 100644 +index cb923e33fd6f..f69fe75352de 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c @@ -1975,7 +1975,8 @@ static int smu_v13_0_0_force_clk_levels(struct smu_context *smu, @@ -13577,35 +13707,6 @@ index 1d024b122b0c..f69fe75352de 100644 break; case SMU_DCEFCLK: case SMU_PCIE: -@@ -2555,18 +2556,16 @@ static int smu_v13_0_0_set_power_profile_mode(struct smu_context *smu, - workload_mask = 1 << workload_type; - - /* Add optimizations for SMU13.0.0/10. Reuse the power saving profile */ -- if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_COMPUTE) { -- if ((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0) && -- ((smu->adev->pm.fw_version == 0x004e6601) || -- (smu->adev->pm.fw_version >= 0x004e7300))) || -- (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10) && -- smu->adev->pm.fw_version >= 0x00504500)) { -- workload_type = smu_cmn_to_asic_specific_index(smu, -- CMN2ASIC_MAPPING_WORKLOAD, -- PP_SMC_POWER_PROFILE_POWERSAVING); -- if (workload_type >= 0) -- workload_mask |= 1 << workload_type; -- } -+ if ((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0) && -+ ((smu->adev->pm.fw_version == 0x004e6601) || -+ (smu->adev->pm.fw_version >= 0x004e7300))) || -+ (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10) && -+ smu->adev->pm.fw_version >= 0x00504500)) { -+ workload_type = smu_cmn_to_asic_specific_index(smu, -+ CMN2ASIC_MAPPING_WORKLOAD, -+ PP_SMC_POWER_PROFILE_POWERSAVING); -+ if (workload_type >= 0) -+ workload_mask |= 1 << workload_type; - } - - ret = smu_cmn_send_smc_msg_with_param(smu, diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c index 9c2c43bfed0b..a71b7c0803f1 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c @@ -13965,6 +14066,99 @@ index ba17d01e6439..6c0f3505bb55 100644 break; case SMU_DCEFCLK: case SMU_PCIE: +diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c +index f68a41eeb1fa..6cd386d0fccb 100644 +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -94,6 +94,8 @@ static int oui(u8 first, u8 second, u8 third) + #define EDID_QUIRK_NON_DESKTOP (1 << 12) + /* Cap the DSC target bitrate to 15bpp */ + #define EDID_QUIRK_CAP_DSC_15BPP (1 << 13) ++/* Fix up a particular 5120x1440@240Hz timing */ ++#define EDID_QUIRK_FIXUP_5120_1440_240 (1 << 14) + + #define MICROSOFT_IEEE_OUI 0xca125c + +@@ -182,6 +184,12 @@ static const struct edid_quirk { + EDID_QUIRK('S', 'A', 'M', 596, EDID_QUIRK_PREFER_LARGE_60), + EDID_QUIRK('S', 'A', 'M', 638, EDID_QUIRK_PREFER_LARGE_60), + ++ /* Samsung C49G95T */ ++ EDID_QUIRK('S', 'A', 'M', 0x7053, EDID_QUIRK_FIXUP_5120_1440_240), ++ ++ /* Samsung S49AG95 */ ++ EDID_QUIRK('S', 'A', 'M', 0x71ac, EDID_QUIRK_FIXUP_5120_1440_240), ++ + /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */ + EDID_QUIRK('S', 'N', 'Y', 0x2541, EDID_QUIRK_FORCE_12BPC), + +@@ -6757,7 +6765,37 @@ static void update_display_info(struct drm_connector *connector, + drm_edid_to_eld(connector, drm_edid); + } + +-static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev, ++static void drm_mode_displayid_detailed_edid_quirks(struct drm_connector *connector, ++ struct drm_display_mode *mode) ++{ ++ unsigned int hsync_width; ++ unsigned int vsync_width; ++ ++ if (connector->display_info.quirks & EDID_QUIRK_FIXUP_5120_1440_240) { ++ if (mode->hdisplay == 5120 && mode->vdisplay == 1440 && ++ mode->clock == 1939490) { ++ hsync_width = mode->hsync_end - mode->hsync_start; ++ vsync_width = mode->vsync_end - mode->vsync_start; ++ ++ mode->clock = 2018490; ++ mode->hdisplay = 5120; ++ mode->hsync_start = 5120 + 8; ++ mode->hsync_end = 5120 + 8 + hsync_width; ++ mode->htotal = 5200; ++ ++ mode->vdisplay = 1440; ++ mode->vsync_start = 1440 + 165; ++ mode->vsync_end = 1440 + 165 + vsync_width; ++ mode->vtotal = 1619; ++ ++ drm_dbg_kms(connector->dev, ++ "[CONNECTOR:%d:%s] Samsung 240Hz mode quirk applied\n", ++ connector->base.id, connector->name); ++ } ++ } ++} ++ ++static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_connector *connector, + struct displayid_detailed_timings_1 *timings, + bool type_7) + { +@@ -6776,7 +6814,7 @@ static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *d + bool hsync_positive = (timings->hsync[1] >> 7) & 0x1; + bool vsync_positive = (timings->vsync[1] >> 7) & 0x1; + +- mode = drm_mode_create(dev); ++ mode = drm_mode_create(connector->dev); + if (!mode) + return NULL; + +@@ -6799,6 +6837,9 @@ static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *d + + if (timings->flags & 0x80) + mode->type |= DRM_MODE_TYPE_PREFERRED; ++ ++ drm_mode_displayid_detailed_edid_quirks(connector, mode); ++ + drm_mode_set_name(mode); + + return mode; +@@ -6821,7 +6862,7 @@ static int add_displayid_detailed_1_modes(struct drm_connector *connector, + for (i = 0; i < num_timings; i++) { + struct displayid_detailed_timings_1 *timings = &det->timings[i]; + +- newmode = drm_mode_displayid_detailed(connector->dev, timings, type_7); ++ newmode = drm_mode_displayid_detailed(connector, timings, type_7); + if (!newmode) + continue; + diff --git a/drivers/net/wireless/realtek/rtw89/pci.c b/drivers/net/wireless/realtek/rtw89/pci.c index 02afeb3acce4..5aef7fa37878 100644 --- a/drivers/net/wireless/realtek/rtw89/pci.c @@ -14049,6 +14243,41 @@ index 02afeb3acce4..5aef7fa37878 100644 resource_len = pci_resource_len(pdev, bar_id); rtwpci->mmap = pci_iomap(pdev, bar_id, resource_len); +diff --git a/drivers/platform/x86/dell/dell-wmi-base.c b/drivers/platform/x86/dell/dell-wmi-base.c +index 502783a7adb1..24fd7ffadda9 100644 +--- a/drivers/platform/x86/dell/dell-wmi-base.c ++++ b/drivers/platform/x86/dell/dell-wmi-base.c +@@ -264,6 +264,15 @@ static const struct key_entry dell_wmi_keymap_type_0010[] = { + /*Speaker Mute*/ + { KE_KEY, 0x109, { KEY_MUTE} }, + ++ /* S2Idle screen off */ ++ { KE_IGNORE, 0x120, { KEY_RESERVED }}, ++ ++ /* Leaving S4 or S2Idle suspend */ ++ { KE_IGNORE, 0x130, { KEY_RESERVED }}, ++ ++ /* Entering S2Idle suspend */ ++ { KE_IGNORE, 0x140, { KEY_RESERVED }}, ++ + /* Mic mute */ + { KE_KEY, 0x150, { KEY_MICMUTE } }, + +diff --git a/mm/mmap.c b/mm/mmap.c +index 18fddcce03b8..d84d6dd8771c 100644 +--- a/mm/mmap.c ++++ b/mm/mmap.c +@@ -1952,10 +1952,6 @@ __get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, + + if (get_area) { + addr = get_area(file, addr, len, pgoff, flags); +- } else if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE)) { +- /* Ensures that larger anonymous mappings are THP aligned. */ +- addr = thp_get_unmapped_area_vmflags(file, addr, len, +- pgoff, flags, vm_flags); + } else { + addr = mm_get_unmapped_area_vmflags(current->mm, file, addr, len, + pgoff, flags, vm_flags); diff --git a/mm/shrinker.c b/mm/shrinker.c index dc5d2a6fcfc4..e4b795ee6d2e 100644 --- a/mm/shrinker.c @@ -14065,15 +14294,53 @@ index dc5d2a6fcfc4..e4b795ee6d2e 100644 rcu_assign_pointer(memcg->nodeinfo[nid]->shrinker_info, info); } mutex_unlock(&shrinker_mutex); +diff --git a/net/netfilter/xt_NFLOG.c b/net/netfilter/xt_NFLOG.c +index d80abd6ccaf8..6dcf4bc7e30b 100644 +--- a/net/netfilter/xt_NFLOG.c ++++ b/net/netfilter/xt_NFLOG.c +@@ -79,7 +79,7 @@ static struct xt_target nflog_tg_reg[] __read_mostly = { + { + .name = "NFLOG", + .revision = 0, +- .family = NFPROTO_IPV4, ++ .family = NFPROTO_IPV6, + .checkentry = nflog_tg_check, + .destroy = nflog_tg_destroy, + .target = nflog_tg, +diff --git a/net/netfilter/xt_TRACE.c b/net/netfilter/xt_TRACE.c +index f3fa4f11348c..a642ff09fc8e 100644 +--- a/net/netfilter/xt_TRACE.c ++++ b/net/netfilter/xt_TRACE.c +@@ -49,6 +49,7 @@ static struct xt_target trace_tg_reg[] __read_mostly = { + .target = trace_tg, + .checkentry = trace_tg_check, + .destroy = trace_tg_destroy, ++ .me = THIS_MODULE, + }, + #endif + }; +diff --git a/net/netfilter/xt_mark.c b/net/netfilter/xt_mark.c +index f76fe04fc9a4..65b965ca40ea 100644 +--- a/net/netfilter/xt_mark.c ++++ b/net/netfilter/xt_mark.c +@@ -62,7 +62,7 @@ static struct xt_target mark_tg_reg[] __read_mostly = { + { + .name = "MARK", + .revision = 2, +- .family = NFPROTO_IPV4, ++ .family = NFPROTO_IPV6, + .target = mark_tg, + .targetsize = sizeof(struct xt_mark_tginfo2), + .me = THIS_MODULE, -- -2.47.0.rc0 +2.47.0 -From 7dfbd6b54cfa794699206bd5f882c85b326523a4 Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:04:25 +0200 +From 234ada9d57a61746a48bc8db0b381589cb541880 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:52:43 +0800 Subject: [PATCH 08/14] intel-pstate -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- arch/x86/include/asm/topology.h | 13 ++ arch/x86/kernel/cpu/aperfmperf.c | 89 +++++++++++- @@ -14081,10 +14348,10 @@ Signed-off-by: Peter Jung 3 files changed, 328 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h -index abe3a8f22cbd..aef70336d624 100644 +index 70ec19877f6e..5b344ff81219 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h -@@ -282,9 +282,22 @@ static inline long arch_scale_freq_capacity(int cpu) +@@ -290,9 +290,22 @@ static inline long arch_scale_freq_capacity(int cpu) } #define arch_scale_freq_capacity arch_scale_freq_capacity @@ -14550,14 +14817,14 @@ index 348a330678bd..c11be253bfa3 100644 } -- -2.47.0.rc0 +2.47.0 -From 2a946474720372a10c7584d5fa279feb2edb591a Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:04:35 +0200 +From 7ed94f621d6d5361b103676ac42e00ece364fc88 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:52:52 +0800 Subject: [PATCH 09/14] ksm -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- arch/alpha/kernel/syscalls/syscall.tbl | 3 + arch/arm/tools/syscall.tbl | 3 + @@ -14983,14 +15250,14 @@ index 01071182763e..7394bad8178e 100644 +464 common process_ksm_disable sys_process_ksm_disable sys_process_ksm_disable +465 common process_ksm_status sys_process_ksm_status sys_process_ksm_status -- -2.47.0.rc0 +2.47.0 -From d97e18a40b5cdf18c6d15befa2e3aef060d2971a Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:04:50 +0200 +From 1c710b0efb6a923417af140e6c070b12fd06426e Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:53:03 +0800 Subject: [PATCH 10/14] ntsync -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- Documentation/userspace-api/index.rst | 1 + Documentation/userspace-api/ntsync.rst | 398 +++++ @@ -18072,14 +18339,14 @@ index 000000000000..5fa2c9a0768c + +TEST_HARNESS_MAIN -- -2.47.0.rc0 +2.47.0 -From bc16b715a926921dcce09026210a30e444f09365 Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:05:01 +0200 +From 700f445a288bd44318a6f1a941eb8547dc6313d5 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:53:18 +0800 Subject: [PATCH 11/14] perf-per-core -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- Documentation/arch/x86/topology.rst | 4 + arch/x86/events/rapl.c | 418 ++++++++++++++++++-------- @@ -18932,7 +19199,7 @@ index b985ca79cf97..8206038a01ac 100644 } module_exit(intel_rapl_exit); diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h -index 279edfd36fed..350a5f9fbd12 100644 +index 9a28b11d0327..833dbb2170a6 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -98,6 +98,7 @@ struct cpuinfo_topology { @@ -18944,10 +19211,10 @@ index 279edfd36fed..350a5f9fbd12 100644 // AMD Node ID and Nodes per Package info u32 amd_node_id; diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h -index aef70336d624..672fccf9f845 100644 +index 5b344ff81219..085611432c95 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h -@@ -137,6 +137,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu); +@@ -143,6 +143,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu); #define topology_logical_package_id(cpu) (cpu_data(cpu).topo.logical_pkg_id) #define topology_physical_package_id(cpu) (cpu_data(cpu).topo.pkg_id) #define topology_logical_die_id(cpu) (cpu_data(cpu).topo.logical_die_id) @@ -18956,11 +19223,11 @@ index aef70336d624..672fccf9f845 100644 #define topology_core_id(cpu) (cpu_data(cpu).topo.core_id) #define topology_ppin(cpu) (cpu_data(cpu).ppin) diff --git a/arch/x86/kernel/cpu/debugfs.c b/arch/x86/kernel/cpu/debugfs.c -index 3baf3e435834..b1eb6d7828db 100644 +index c3361e496df9..531727db9244 100644 --- a/arch/x86/kernel/cpu/debugfs.c +++ b/arch/x86/kernel/cpu/debugfs.c -@@ -24,6 +24,7 @@ static int cpu_debug_show(struct seq_file *m, void *p) - seq_printf(m, "core_id: %u\n", c->topo.core_id); +@@ -25,6 +25,7 @@ static int cpu_debug_show(struct seq_file *m, void *p) + seq_printf(m, "cpu_type: %u\n", topology_cpu_type(c)); seq_printf(m, "logical_pkg_id: %u\n", c->topo.logical_pkg_id); seq_printf(m, "logical_die_id: %u\n", c->topo.logical_die_id); + seq_printf(m, "logical_core_id: %u\n", c->topo.logical_core_id); @@ -18968,10 +19235,10 @@ index 3baf3e435834..b1eb6d7828db 100644 seq_printf(m, "l2c_id: %u\n", c->topo.l2c_id); seq_printf(m, "amd_node_id: %u\n", c->topo.amd_node_id); diff --git a/arch/x86/kernel/cpu/topology_common.c b/arch/x86/kernel/cpu/topology_common.c -index 9a6069e7133c..23722aa21e2f 100644 +index 04b012dffa47..fc4952ba1157 100644 --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c -@@ -151,6 +151,7 @@ static void topo_set_ids(struct topo_scan *tscan, bool early) +@@ -164,6 +164,7 @@ static void topo_set_ids(struct topo_scan *tscan, bool early) if (!early) { c->topo.logical_pkg_id = topology_get_logical_id(apicid, TOPO_PKG_DOMAIN); c->topo.logical_die_id = topology_get_logical_id(apicid, TOPO_DIE_DOMAIN); @@ -18980,14 +19247,14 @@ index 9a6069e7133c..23722aa21e2f 100644 /* Package relative core ID */ -- -2.47.0.rc0 +2.47.0 -From c988ff6876f550e82bddfecf5048e3403e2d4b8e Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:05:21 +0200 +From ffab2eb3364a202d5877a416e309303a2c76adc8 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:53:29 +0800 Subject: [PATCH 12/14] t2 -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- .../ABI/testing/sysfs-driver-hid-appletb-kbd | 13 + Documentation/core-api/printk-formats.rst | 32 + @@ -29395,14 +29662,14 @@ index 4427572b2477..b60c99d61882 100755 last; } -- -2.47.0.rc0 +2.47.0 -From 1399f3445a16951721064f590b8c3fce99aa2689 Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:05:34 +0200 +From e6b7bcc3665414747dd2976d41a8b8f4f052dd77 Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:53:44 +0800 Subject: [PATCH 13/14] thp-shrinker -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- Documentation/admin-guide/mm/transhuge.rst | 16 +++ include/linux/huge_mm.h | 4 +- @@ -29808,7 +30075,7 @@ index 4d2839fcf688..3292411ad8ed 100644 } diff --git a/mm/khugepaged.c b/mm/khugepaged.c -index cdd1d8655a76..02e1463e1a79 100644 +index 4cba91ecf74b..ee490f1e7de2 100644 --- a/mm/khugepaged.c +++ b/mm/khugepaged.c @@ -85,7 +85,7 @@ static DECLARE_WAIT_QUEUE_HEAD(khugepaged_wait); @@ -30042,7 +30309,7 @@ index 2490e727e2dc..77b5185058b4 100644 __folio_mod_stat(folio, -nr, -nr_pmdmapped); diff --git a/mm/vmscan.c b/mm/vmscan.c -index 47065ea3c47b..6fccc4c99907 100644 +index 35b67785907b..ca76f7df2d54 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c @@ -1232,7 +1232,8 @@ static unsigned int shrink_folio_list(struct list_head *folio_list, @@ -30209,14 +30476,14 @@ index 9007c420d52c..2eaed8209925 100644 bool check_huge_file(void *addr, int nr_hpages, uint64_t hpage_size); bool check_huge_shmem(void *addr, int nr_hpages, uint64_t hpage_size); -- -2.47.0.rc0 +2.47.0 -From 450642cca4b044b4f2f485f6038045c1ddd32086 Mon Sep 17 00:00:00 2001 -From: Peter Jung -Date: Thu, 17 Oct 2024 16:05:48 +0200 +From e4532e97539df2476624d56a4473c63350db44cc Mon Sep 17 00:00:00 2001 +From: Eric Naim +Date: Tue, 22 Oct 2024 22:53:58 +0800 Subject: [PATCH 14/14] zstd -Signed-off-by: Peter Jung +Signed-off-by: Eric Naim --- include/linux/zstd.h | 2 +- include/linux/zstd_errors.h | 23 +- @@ -48861,4 +49128,4 @@ index f4ed952ed485..7d31518e9d5a 100644 EXPORT_SYMBOL(zstd_reset_dstream); -- -2.47.0.rc0 +2.47.0