85 lines
2.5 KiB
C
85 lines
2.5 KiB
C
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/*
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* SPDX-License-Identifier: MIT
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* Copyright (C) 2004 - 2021 AJA Video Systems, Inc.
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*/
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////////////////////////////////////////////////////////////
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//
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// Filename: ntv2mcap.h
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// Purpose: Xilinx bitfile loading
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//
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///////////////////////////////////////////////////////////////
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#ifndef NTV2MCAP_HEADER
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#define NTV2MCAP_HEADER
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#include "ntv2system.h"
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/* mcap register map */
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#define MCAP_EXT_CAP_HEADER 0x00
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#define MCAP_VEND_SPEC_HEADER 0x04
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#define MCAP_FPGA_JTAG_ID 0x08
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#define MCAP_FPGA_BIT_VERSION 0x0C
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#define MCAP_STATUS 0x10
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#define MCAP_CONTROL 0x14
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#define MCAP_DATA 0x18
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#define MCAP_READ_DATA_0 0x1C
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#define MCAP_READ_DATA_1 0x20
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#define MCAP_READ_DATA_2 0x24
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#define MCAP_READ_DATA_3 0x28
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/* mcap control register bit map */
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#define MCAP_CTRL_CONFIG_ENABLE_MASK (1 << 0)
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#define MCAP_CTRL_READ_ENABLE_MASK (1 << 1)
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#define MCAP_CTRL_CONFIG_RESET_MASK (1 << 4)
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#define MCAP_CTRL_MODULE_RESET_MASK (1 << 5)
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#define MCAP_CTRL_PCI_REQUEST_MASK (1 << 8)
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#define MCAP_CTRL_BAR_ENABLE_MASK (1 << 12)
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#define MCAP_CTRL_WRITE_ENABLE_MASK (1 << 16)
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/* mcap status register bit map */
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#define MCAP_STS_ERR_MASK (1 << 0)
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#define MCAP_STS_EOS_MASK (1 << 1)
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#define MCAP_STS_REG_READ_CMP_MASK (1 << 4)
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#define MCAP_STS_REG_READ_COUNT_MASK (7 << 5)
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#define MCAP_STS_REG_READ_COUNT_SHIFT (5)
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#define MCAP_STS_FIFO_OVERFLOW_MASK (1 << 8)
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#define MCAP_STS_FIFO_OCCUPANCY_MASK (15 << 12)
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#define MCAP_STS_FIFO_OCCUPANCY_SHIFT (12)
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#define MCAP_STS_CONFIG_RELEASE_MASK (1 << 24)
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/* mcap pci extended capability id */
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#define MCAP_EXT_CAP_ID 0xB
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/* mcap timeout counts */
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#define MCAP_EOS_RETRY_COUNT 10
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#define MCAP_EOS_LOOP_COUNT 100
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/* mcap bit data fill */
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#define MCAP_NOOP_VAL 0x2000000
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#define NTV2_MCAP_STRING_SIZE 80
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struct ntv2_mcap {
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char name[NTV2_MCAP_STRING_SIZE];
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Ntv2SystemContext* system_context;
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int32_t reg_base;
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bool fragment;
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};
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struct ntv2_mcap *ntv2_mcap_open(Ntv2SystemContext *sys_con, const char *name);
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void ntv2_mcap_close(struct ntv2_mcap *ntv2_mc);
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Ntv2Status ntv2_mcap_configure(struct ntv2_mcap *ntv2_mc);
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Ntv2Status ntv2_mcap_config_reset(struct ntv2_mcap *ntv2_mc);
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Ntv2Status ntv2_mcap_module_reset(struct ntv2_mcap *ntv2_mc);
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Ntv2Status ntv2_mcap_full_reset(struct ntv2_mcap *ntv2_mc);
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Ntv2Status ntv2_mcap_write_bitstream(struct ntv2_mcap *ntv2_mc, void* data,
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uint32_t bytes, bool fragment, bool swap);
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Ntv2Status ntv2_mcap_read_register(struct ntv2_mcap *ntv2_mc, uint32_t offset, uint32_t* data);
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#endif
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