890 lines
30 KiB
C
890 lines
30 KiB
C
/*
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* SPDX-License-Identifier: MIT
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* Copyright (C) 2004 - 2021 AJA Video Systems, Inc.
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*/
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///////////////////////////////////////////////////////////////
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//
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// NTV2 Linux v2.6 Device Driver for AJA devices.
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//
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////////////////////////////////////////////////////////////
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//
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// Filename: registerio.h
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// Purpose: Read/write real and virtual registers header file
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// Notes:
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//
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///////////////////////////////////////////////////////////////
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#ifndef REGISTERIO_H
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#define REGISTERIO_H
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#include <linux/wait.h>
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//As of 2.6.26 semaphore is in include/linux
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#include <linux/version.h>
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#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25))
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# include <linux/semaphore.h>
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#else
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# include <asm/semaphore.h>
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#endif
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// Some kernel version sensitive macro-rama
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
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#define NTV2_LINUX_IRQ_SHARED_FLAG IRQF_SHARED
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#define NTV2_LINUX_IRQ_SAMPLE_RANDOM_FLAG IRQF_SAMPLE_RANDOM
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#else
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#define NTV2_LINUX_IRQ_SHARED_FLAG SA_SHIRQ
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#define NTV2_LINUX_IRQ_SAMPLE_RANDOM_FLAG SA_SAMPLE_RANDOM
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#endif
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
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#define NTV2_LINUX_PCI_REG_DRIVER_FUNC(x) pci_register_driver(x)
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#else
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#define NTV2_LINUX_PCI_REG_DRIVER_FUNC(x) pci_module_init(x)
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#endif
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
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# define NTV2_LINUX_SG_INIT_TABLE_FUNC(x,y) sg_init_table((x),(y))
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#else
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# define NTV2_LINUX_SG_INIT_TABLE_FUNC(x,y) memset((x),0,sizeof(struct scatterlist) * (y));
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#endif
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#include "ntv2driverautocirculate.h"
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#include "../ntv2hdmiin.h"
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#include "../ntv2hdmiin4.h"
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#include "../ntv2kona.h"
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#include "../ntv2setup.h"
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// clean old stuff
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#define FGVCROSSPOINTMASK (BIT_0+BIT_1+BIT_2+BIT_3)
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#define FGVCROSSPOINTSHIFT (0)
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#define BGVCROSSPOINTMASK (BIT_4+BIT_5+BIT_6+BIT_7)
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#define BGVCROSSPOINTSHIFT (4)
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#define FGKCROSSPOINTMASK (BIT_8+BIT_9+BIT_10+BIT_11)
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#define FGKCROSSPOINTSHIFT (8)
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#define BGKCROSSPOINTMASK (BIT_12+BIT_13+BIT_14+BIT_15)
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#define BGKCROSSPOINTSHIFT (12)
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#define VIDPROCMUX1MASK (BIT_0+BIT_1)
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#define VIDPROCMUX1SHIFT (0)
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#define VIDPROCMUX2MASK (BIT_2+BIT_3)
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#define VIDPROCMUX2SHIFT (2)
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#define VIDPROCMUX3MASK (BIT_4+BIT_5)
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#define VIDPROCMUX3SHIFT (4)
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#define VIDPROCMUX4MASK (BIT_6+BIT_7)
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#define VIDPROCMUX4SHIFT (6)
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#define VIDPROCMUX5MASK (BIT_8+BIT_9)
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#define VIDPROCMUX5SHIFT (8)
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// Comment out SOFTWARE_UART_FIFO define to turn off software FIFO completely.
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//# define SOFTWARE_UART_FIFO
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# ifdef SOFTWARE_UART_FIFO
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// Comment out either UARTRXFIFOSIZE or UARTTXFIFOSIZE to disable
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// Rx or Tx software FIFO.
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# define UARTRXFIFOSIZE 20
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# define UARTTXFIFOSIZE 20
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# endif // SOFTWARE_UART_FIFO
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//#define FPGA_REQ_FOR_DMA (eFPGAVideoProc)
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//#define NTV2_MAX_FPGA (eFPGAVideoProc)
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#define NTV2_MAX_HDMI_MONITOR 4
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// Singleton module params
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typedef struct ntv2_module_private
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{
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int NTV2Major;
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UWord numNTV2Devices;
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char * name;
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char * driverName;
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ULWord intrBitLut[eNumInterruptTypes];
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struct class *class;
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// uart driver
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struct uart_driver *uart_driver;
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u32 uart_max;
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atomic_t uart_index;
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} NTV2ModulePrivateParams;
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typedef enum
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{
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eIrqFpga = 0,
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eNumNTV2IRQDevices
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} ntv2_irq_device_t;
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// Define interrupt control, dma, and flash register bits
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enum
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{
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kIntOutputVBLEnable = BIT (0),
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kIntInput1VBLEnable = BIT (1),
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kIntInput2VBLEnable = BIT (2),
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kIntAudioWrapEnable = BIT (3),
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kIntAudioOutWrapEnable = BIT (4),
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kIntAudioInWrapEnable = BIT (5),
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kIntAuxVerticalEnable = BIT (11),
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// Status register
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kIntOutput1VBLActive = BIT (31),
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kIntOutput1VBLClear = BIT (31),
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kIntInput1VBLActive = BIT (30),
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kintInput1VBLClear = BIT (30),
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kIntInput2VBLActive = BIT (29),
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kIntInput2VBLClear = BIT (29),
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kIntAudioWrapActive = BIT (28),
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kIntAudioWrapClear = BIT (28),
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kIntAudioOutWrapActive = BIT (27),
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kIntAudioOutWrapClear = BIT (27),
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kIntUartTx2Active = BIT (26),
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kIntUartTx2Clear = BIT (26),
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kIntOutput2VBLActive = BIT (8),
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kIntOutput2VBLClear = BIT (23),
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kIntOutput3VBLActive = BIT (7),
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kIntOutput3VBLClear = BIT (22),
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kIntOutput4VBLActive = BIT (6),
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kIntOutput4VBL = BIT (21),
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kIntAuxVerticalActive = BIT (12),
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kIntAuxVerticalClear = BIT (12),
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kIntI2C2Active = BIT (13),
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kIntI2C2Clear = BIT (13),
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kIntI2C1Active = BIT (14),
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kIntI2C1Clear = BIT (14),
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// Status register 2
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kIntInput3VBLActive = BIT (30),
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kIntInput3VBLClear = BIT (30),
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kIntInput4VBLActive = BIT (29),
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kIntInput4VBLClear = BIT (29),
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kIntInput5VBLActive = BIT (28),
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kIntInput5VBLClear = BIT (28),
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kIntInput6VBLActive = BIT (27),
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kIntInput6VBLClear = BIT (27),
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kIntInput7VBLActive = BIT (26),
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kIntInput7VBLClear = BIT (26),
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kIntInput8VBLActive = BIT (25),
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kIntInput8VBLClear = BIT (25),
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kIntOutput5VBLActive = BIT (31),
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kIntOutput5VBLClear = BIT (19),
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kIntOutput6VBLActive = BIT (24),
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kIntOutput6VBLClear = BIT (18),
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kIntOutput7VBLActive = BIT (23),
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kIntOutput7VBLClear = BIT (17),
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kIntOutput8VBLActive = BIT (22),
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kIntOutput8VBLClear = BIT (16),
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kIntDma1Enable = BIT (0),
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kIntDma2Enable = BIT (1),
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kIntDma3Enable = BIT (2),
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kIntDma4Enable = BIT (3),
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kIntBusErrEnable = BIT (4),
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kIntDmaEnableMask = BIT (0) + BIT (1) + BIT (2) + BIT (3) + BIT (4),
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kIntValidation = BIT (26),
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kIntDMA1 = BIT (27),
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kIntDMA2 = BIT (28),
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kIntDMA3 = BIT (29),
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kIntDMA4 = BIT (30),
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kIntBusErr = BIT (31),
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kIntDmaMask = BIT (27) + BIT (28) + BIT (29) + BIT (30) + BIT (31),
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kIntPBChange = BIT (0),
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kIntLowPower = BIT (1),
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kIntDisplayFifo = BIT (2),
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kIntSATAChange = BIT (3), // CF Presence Detect Change in Bones product ....
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kIntTemp1High = BIT (4),
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kIntTemp2High = BIT (5),
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kIntPowerButtonChange = BIT (6),
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kIntCPLDMask = BIT (0) + BIT (1) + BIT (2) + BIT (3) + BIT (4) + BIT(5) + BIT(6),
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kDma1Go = BIT (0),
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kDma2Go = BIT (1),
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kDma3Go = BIT (2),
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kDma4Go = BIT (3),
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kRegDMAToHostBit = BIT (31),
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kRegDMAAudioModeBit = BIT (30),
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kRegFlashResetBit = BIT (10),
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kRegFlashDoneBit = BIT (9),
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kRegFlashPgmRdyBit = BIT (8),
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kRegFlashDataMask = BIT (7) + BIT (6) + BIT (5) + BIT (4) + BIT (3) + BIT (2) + BIT (1) + BIT (0)
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};
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// The ntv2_irq_device_t enums must match up with the array of function
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// pointers below.
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// Params that are per-device
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typedef struct ntv2_private
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{
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struct pci_dev *pci_dev;
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ULWord deviceNumber;
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ULWord busNumber;
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ULWord pci_device;
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char name[16];
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struct cdev cdev;
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// Base Address Values
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unsigned long _unmappedBAR0Address;
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unsigned long _mappedBAR0Address;
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ULWord _BAR0MemorySize;
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unsigned long _unmappedBAR1Address;
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unsigned long _mappedBAR1Address;
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ULWord _BAR1MemorySize;
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unsigned long _unmappedBAR2Address;
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unsigned long _mappedBAR2Address;
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ULWord _BAR2MemorySize;
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// Holds the number of hardware registers this device supports
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// Obtained from ntv2devicefeatures.cpp
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ULWord _numberOfHWRegisters;
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// Reserved HighMem DMA Buffer if needed.
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// used when setting boot option mem = totalmem-16Megs for SD or 64 Megs for HD.
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// this is NumDmaDriverBuffers frames worth.
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// These are the video registers
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unsigned long _VideoAddress;
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ULWord _VideoMemorySize;
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// The NWL dma registers actually live in BAR0, but usually BAR0 is used to map
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// the video control registers, so use a different set of variables for NWL to avoid confusion.
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unsigned long _NwlAddress;
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ULWord _NwlMemorySize;
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// The Xlnx dma registers live in 64K BAR1.
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unsigned long _XlnxAddress;
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ULWord _XlnxMemorySize;
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// The bigphysarea kernel patch returns a virtual address to contiguous LowMem
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unsigned long _dmaBuffer;
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caddr_t _virtBuffer;
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ULWord _bigphysBufferSize; // # of bytes allocated.
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// Pointers to Channel 1 and Channel 2 Frame Buffers
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// This pointer along with the value of _pCh1Control or _pCh1Control
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// register to address a given frame in the frame buffer.
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// unsigned long* _Ch1BaseAddress;
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// unsigned long* _Ch2BaseAddress;
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// Registers - See hdntv.pdf or Ntv2.pdf for details.
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unsigned long _pGlobalControl;
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unsigned long _pGlobalControl2;
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// clean old stuff
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unsigned long _pVideoProcessingControl;
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unsigned long _pVideoProcessingCrossPointControl;
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// interrupt
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unsigned long _pInterruptControl;
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unsigned long _pInterruptControl2;
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unsigned long _pStatus;
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unsigned long _pStatus2;
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// audio control
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unsigned long _pAudioControl;
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unsigned long _pAudioSource;
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unsigned long _pAudioLastOut;
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unsigned long _pAudioLastIn;
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unsigned long _pAudio2Control;
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unsigned long _pAudio2Source;
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unsigned long _pAudio2LastOut;
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unsigned long _pAudio2LastIn;
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unsigned long _pAudio3Control;
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unsigned long _pAudio3Source;
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unsigned long _pAudio3LastOut;
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unsigned long _pAudio3LastIn;
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unsigned long _pAudio4Control;
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unsigned long _pAudio4Source;
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unsigned long _pAudio4LastOut;
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unsigned long _pAudio4LastIn;
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unsigned long _pAudio5Control;
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unsigned long _pAudio5Source;
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unsigned long _pAudio5LastOut;
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unsigned long _pAudio5LastIn;
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unsigned long _pAudio6Control;
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unsigned long _pAudio6Source;
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unsigned long _pAudio6LastOut;
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unsigned long _pAudio6LastIn;
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unsigned long _pAudio7Control;
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unsigned long _pAudio7Source;
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unsigned long _pAudio7LastOut;
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unsigned long _pAudio7LastIn;
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unsigned long _pAudio8Control;
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unsigned long _pAudio8Source;
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unsigned long _pAudio8LastOut;
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unsigned long _pAudio8LastIn;
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unsigned long _pAudioSampleCounter;
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// aja dma registers
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unsigned long _pDMA1HostAddress;
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unsigned long _pDMA1LocalAddress;
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unsigned long _pDMA1TransferCount;
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unsigned long _pDMA1NextDescriptor;
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unsigned long _pDMA2HostAddress;
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unsigned long _pDMA2LocalAddress;
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unsigned long _pDMA2TransferCount;
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unsigned long _pDMA2NextDescriptor;
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unsigned long _pDMA3HostAddress;
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unsigned long _pDMA3LocalAddress;
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unsigned long _pDMA3TransferCount;
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unsigned long _pDMA3NextDescriptor;
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unsigned long _pDMA4HostAddress;
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unsigned long _pDMA4LocalAddress;
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unsigned long _pDMA4TransferCount;
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unsigned long _pDMA4NextDescriptor;
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unsigned long _pDMA1HostAddressHigh;
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unsigned long _pDMA1NextDescriptorHigh;
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unsigned long _pDMA2HostAddressHigh;
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unsigned long _pDMA2NextDescriptorHigh;
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unsigned long _pDMA3HostAddressHigh;
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unsigned long _pDMA3NextDescriptorHigh;
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unsigned long _pDMA4HostAddressHigh;
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unsigned long _pDMA4NextDescriptorHigh;
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unsigned long _pDMAControlStatus;
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unsigned long _pDMAInterruptControl;
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bool _bMultiChannel;
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unsigned long _pDeviceID; // device ID register
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# ifdef SOFTWARE_UART_FIFO
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# ifdef UARTTXFIFOSIZE
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unsigned long _pUARTTransmitData;
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# endif
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# ifdef UARTRXFIFOSIZE
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unsigned long _pUARTReceiveData;
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# endif
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unsigned long _pUARTControl;
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# ifdef UARTTXFIFOSIZE
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unsigned long _pUARTTransmitData2;
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# endif
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# ifdef UARTRXFIFOSIZE
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unsigned long _pUARTReceiveData2;
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# endif
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unsigned long _pUARTControl2;
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# endif // SOFTWARE_UART_FIFO
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NTV2DeviceID _DeviceID; // device ID value
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wait_queue_head_t _interruptWait[eNumInterruptTypes];
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ULWord64 _interruptCount[eNumInterruptTypes];
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unsigned long _interruptHappened[eNumInterruptTypes];
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struct semaphore _I2CMutex;
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// dma engines
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NTV2DmaMethod _dmaMethod;
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DMA_ENGINE _dmaEngine[DMA_NUM_ENGINES];
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ULWord _dmaNumEngines;
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struct semaphore _dmaSerialSemaphore;
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int _numXlnxH2CEngines;
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int _numXlnxC2HEngines;
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// Autocirculate stuff.
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INTERNAL_AUTOCIRCULATE_STRUCT _AutoCirculate[NUM_CIRCULATORS];
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NTV2Crosspoint _LkUpAcChanSpecGivenEngine[NUM_CIRCULATORS];
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//audio clock!
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ULWord _ulNumberOfWrapsOfClockSampleCounter;//The software sample counter is 64 bit...
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// So this keeps track of the number of wraps
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// around of the 32-bit HW counter.
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ULWord _ulLastClockSampleCounter; //value the register had last time it was read;
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spinlock_t _registerSpinLock;
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spinlock_t _autoCirculateLock;
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spinlock_t _virtualRegisterLock;
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spinlock_t _nwlRegisterLock[NUM_NWL_REGS];
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spinlock_t _p2pInterruptControlRegisterLock;
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spinlock_t _audioClockLock;
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spinlock_t _bankAndRegisterAccessLock;
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struct semaphore _mailBoxSemaphore;
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NTV2_GlobalAudioPlaybackMode _globalAudioPlaybackMode;
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ULWord _videoBitfileProgramming;
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bool _startAudioNextFrame;
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bool _bitFileInfoSet[eFPGA_NUM_FPGAs];
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BITFILE_INFO_STRUCT bitFileInfo[eFPGA_NUM_FPGAs];
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VirtualProcAmpRegisters _virtualProcAmpRegisters;
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HardwareProcAmpRegisterImage _hwProcAmpRegisterImage;
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# ifdef SOFTWARE_UART_FIFO
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# ifdef UARTRXFIFOSIZE
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spinlock_t uartRxFifoLock;
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UByte uartRxFifo[UARTRXFIFOSIZE];
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ULWord uartRxFifoSize;
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bool uartRxFifoOverrun;
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spinlock_t uartRxFifoLock2;
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UByte uartRxFifo2[UARTRXFIFOSIZE];
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ULWord uartRxFifoSize2;
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bool uartRxFifoOverrun2;
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# endif
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# ifdef UARTTXFIFOSIZE
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spinlock_t uartTxFifoLock;
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UByte uartTxFifo[UARTTXFIFOSIZE];
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ULWord uartTxFifoSize;
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spinlock_t uartTxFifoLock2;
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UByte uartTxFifo2[UARTTXFIFOSIZE];
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ULWord uartTxFifoSize2;
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# endif
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# endif // SOFTWARE_UART_FIFO
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unsigned int _ntv2IRQ[eNumNTV2IRQDevices];
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ULWord _audioSyncTolerance;
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ULWord _dmaSerialize;
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ULWord _syncChannels;
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NTV2Crosspoint _syncChannel1;
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NTV2Crosspoint _syncChannel2;
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// Virtual registers
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ULWord _virtualRegisterMem[MAX_NUM_VIRTUAL_REGISTERS];
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//
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// Control panel additions
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//
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ULWord _ApplicationPID; // 10184
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ULWord _ApplicationCode; // 10185
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ULWord _ApplicationReferenceCount; // 10326 and 10327
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ULWord _VirtualMailBoxTimeoutNS; // 10478 // Units are 100 ns, not nanoseconds!
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// P2P - Peer to peer messaging
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unsigned long _pMessageChannel1; // control register kerenel address
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unsigned long _pMessageChannel2;
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unsigned long _pMessageChannel3;
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unsigned long _pMessageChannel4;
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unsigned long _pMessageChannel5;
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unsigned long _pMessageChannel6;
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unsigned long _pMessageChannel7;
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unsigned long _pMessageChannel8;
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unsigned long _pPhysicalMessageChannel1; // control registere bus address
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unsigned long _pPhysicalMessageChannel2;
|
|
unsigned long _pPhysicalMessageChannel3;
|
|
unsigned long _pPhysicalMessageChannel4;
|
|
unsigned long _pPhysicalMessageChannel5;
|
|
unsigned long _pPhysicalMessageChannel6;
|
|
unsigned long _pPhysicalMessageChannel7;
|
|
unsigned long _pPhysicalMessageChannel8;
|
|
|
|
unsigned long _pMessageInterruptStatus; // kerenel address
|
|
unsigned long _pMessageInterruptControl;
|
|
|
|
unsigned long _pPhysicalOutputChannel1; // bus address
|
|
unsigned long _pPhysicalOutputChannel2;
|
|
unsigned long _pPhysicalOutputChannel3;
|
|
unsigned long _pPhysicalOutputChannel4;
|
|
unsigned long _pPhysicalOutputChannel5;
|
|
unsigned long _pPhysicalOutputChannel6;
|
|
unsigned long _pPhysicalOutputChannel7;
|
|
unsigned long _pPhysicalOutputChannel8;
|
|
|
|
unsigned long _FrameAperturePhysicalAddress; // bus
|
|
unsigned long _FrameApertureBaseAddress; // kernel
|
|
ULWord _FrameApertureBaseSize;
|
|
unsigned long _pFrameApertureOffset;
|
|
|
|
ULWord _PCIDeviceControlOffset;
|
|
|
|
Ntv2SystemContext systemContext;
|
|
// struct ntv2_genlock *m_pGenlockMonitor;
|
|
struct ntv2_hdmiin *m_pHDMIInputMonitor[NTV2_MAX_HDMI_MONITOR];
|
|
struct ntv2_hdmiin4 *m_pHDMIIn4Monitor[NTV2_MAX_HDMI_MONITOR];
|
|
struct ntv2_hdmiout4 *m_pHDMIOut4Monitor[NTV2_MAX_HDMI_MONITOR];
|
|
struct ntv2_serial *m_pSerialPort;
|
|
struct ntv2_mcap *m_pBitstream;
|
|
struct ntv2_setup *m_pSetupMonitor;
|
|
|
|
bool registerEnable;
|
|
bool serialActive;
|
|
|
|
#if defined(AJA_HEVC)
|
|
unsigned long _hevcDevNum;
|
|
#endif
|
|
|
|
ULWord _AncF2StartMemory[NTV2_MAX_NUM_CHANNELS];
|
|
ULWord _AncF2StopMemory[NTV2_MAX_NUM_CHANNELS];
|
|
ULWord _AncF2Size[NTV2_MAX_NUM_CHANNELS];
|
|
} NTV2PrivateParams;
|
|
|
|
NTV2ModulePrivateParams * getNTV2ModuleParams(void);
|
|
NTV2PrivateParams * getNTV2Params(unsigned int deviceNumber);
|
|
|
|
// Null mask and null shift for ReadRegister and WriteRegister
|
|
//
|
|
#define NO_MASK (0xFFFFFFFF)
|
|
#define NO_SHIFT (0)
|
|
|
|
#define NTV2REGWRITEMODEMASK (BIT_20+BIT_21)
|
|
#define NTV2REGWRITEMODESHIFT (20)
|
|
#define NTV2LEDSTATEMASK (BIT_16+BIT_17+BIT_18+BIT_19)
|
|
#define NTV2LEDSTATESHIFT (16)
|
|
|
|
// Billions and billions of prototypes for reading and writing registers
|
|
//
|
|
ULWord READ_REGISTER_ULWord( unsigned long address);
|
|
ULWord READ_REGISTER_UWord( unsigned long address);
|
|
ULWord READ_REGISTER_UByte( unsigned long address);
|
|
|
|
void WRITE_REGISTER_ULWord( unsigned long address, ULWord regValue);
|
|
void WRITE_REGISTER_UWord( unsigned long address, ULWord regValue);
|
|
void WRITE_REGISTER_UByte( unsigned long address, ULWord regValue);
|
|
|
|
void GetActiveFrameBufferSize(ULWord deviceNumber,NTV2FrameDimensions * frameBufferSize);
|
|
|
|
// Write a single register with mask and shift
|
|
void WriteRegister( ULWord deviceNumber,
|
|
ULWord registerNumber,
|
|
ULWord registerValue,
|
|
ULWord registerMask,
|
|
ULWord registerShift);
|
|
|
|
// Write a group of registers as a block
|
|
void WriteRegisterBufferULWord( ULWord deviceNumber,
|
|
ULWord registerNumber,
|
|
ULWord* sourceData,
|
|
ULWord sourceDataSizeULWords);
|
|
|
|
ULWord ReadRegister(ULWord deviceNumber,ULWord registerNumber, ULWord registerMask, ULWord registerShift);
|
|
|
|
// old stuff
|
|
void WriteVideoProcessingControl(ULWord deviceNumber,ULWord value);
|
|
ULWord ReadVideoProcessingControl(ULWord deviceNumber);
|
|
void WriteVideoProcessingControlCrosspoint(ULWord deviceNumber,ULWord value);
|
|
ULWord ReadVideoProcessingControlCrosspoint(ULWord deviceNumber);
|
|
|
|
void SetBackgroundKeyCrosspoint(ULWord deviceNumber, NTV2Crosspoint crosspoint);
|
|
void SetBackgroundVideoCrosspoint(ULWord deviceNumber, NTV2Crosspoint crosspoint);
|
|
void SetForegroundKeyCrosspoint(ULWord deviceNumber, NTV2Crosspoint crosspoint);
|
|
void SetForegroundVideoCrosspoint(ULWord deviceNumber, NTV2Crosspoint crosspoint);
|
|
|
|
void WriteInterruptRegister(ULWord deviceNumber ,ULWord value);
|
|
ULWord ReadInterruptRegister(ULWord deviceNumber);
|
|
ULWord ReadStatusRegister(ULWord deviceNumber);
|
|
|
|
void WriteInterrupt2Register(ULWord deviceNumber ,ULWord value);
|
|
ULWord ReadInterrupt2Register(ULWord deviceNumber);
|
|
ULWord ReadStatus2Register(ULWord deviceNumber);
|
|
|
|
void SetRegisterWriteMode(ULWord deviceNumber, NTV2Channel channel, NTV2RegisterWriteMode value);
|
|
NTV2RegisterWriteMode GetRegisterWriteMode(ULWord deviceNumber, NTV2Channel channel);
|
|
|
|
void SetLEDState(ULWord deviceNumber,ULWord value);
|
|
ULWord GetLEDState(ULWord deviceNumber);
|
|
|
|
void SetSingleLED(ULWord deviceNumber,ULWord bitNum);
|
|
void ClearSingleLED(ULWord deviceNumber,ULWord bitNum);
|
|
|
|
// audio out last
|
|
ULWord ReadAudioLastOut(ULWord deviceNumber);
|
|
ULWord ReadAudioLastOut2(ULWord deviceNumber);
|
|
ULWord ReadAudioLastOut3(ULWord deviceNumber);
|
|
ULWord ReadAudioLastOut4(ULWord deviceNumber);
|
|
ULWord ReadAudioLastOut5(ULWord deviceNumber);
|
|
ULWord ReadAudioLastOut6(ULWord deviceNumber);
|
|
ULWord ReadAudioLastOut7(ULWord deviceNumber);
|
|
ULWord ReadAudioLastOut8(ULWord deviceNumber);
|
|
|
|
// audio in last
|
|
ULWord ReadAudioLastIn(ULWord deviceNumber);
|
|
ULWord ReadAudioLastIn2(ULWord deviceNumber);
|
|
ULWord ReadAudioLastIn3(ULWord deviceNumber);
|
|
ULWord ReadAudioLastIn4(ULWord deviceNumber);
|
|
ULWord ReadAudioLastIn5(ULWord deviceNumber);
|
|
ULWord ReadAudioLastIn6(ULWord deviceNumber);
|
|
ULWord ReadAudioLastIn7(ULWord deviceNumber);
|
|
ULWord ReadAudioLastIn8(ULWord deviceNumber);
|
|
|
|
ULWord ReadAudioSampleCounter(ULWord deviceNumber);
|
|
|
|
void AvInterruptControl(ULWord deviceNumber,
|
|
INTERRUPT_ENUMS eInterruptType, // Which interrupt
|
|
ULWord enable); // 0: disable, nonzero: enable
|
|
|
|
void ClearInput1VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearInput2VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearInput3VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearInput4VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearInput5VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearInput6VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearInput7VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearInput8VerticalInterrupt(ULWord deviceNumber);
|
|
|
|
void ClearOutputVerticalInterrupt(ULWord deviceNumber);
|
|
void ClearOutput2VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearOutput3VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearOutput4VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearOutput5VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearOutput6VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearOutput7VerticalInterrupt(ULWord deviceNumber);
|
|
void ClearOutput8VerticalInterrupt(ULWord deviceNumber);
|
|
|
|
void ClearAudioInterrupt(ULWord deviceNumber);
|
|
|
|
void ClearUartRxInterrupt(ULWord deviceNumber);
|
|
|
|
void ClearUartTxInterrupt(ULWord deviceNumber);
|
|
void ClearUartTxInterrupt2(ULWord deviceNumber);
|
|
|
|
ULWord ReadDeviceIDRegister(ULWord deviceNumber);
|
|
|
|
//////////////////////////////////////////////////////////////////
|
|
// Aja methods
|
|
//
|
|
ULWord ReadDMARegister(ULWord deviceNumber, ULWord regNum);
|
|
void WriteDMARegister(ULWord deviceNumber, ULWord regNum, ULWord value);
|
|
bool ConfigureDMAChannels(ULWord deviceNumber);
|
|
void WriteDMAHostAddressLow(ULWord deviceNumber, ULWord index, ULWord value);
|
|
void WriteDMAHostAddressHigh(ULWord deviceNumber, ULWord index, ULWord value);
|
|
void WriteDMALocalAddress(ULWord deviceNumber, ULWord index, ULWord value);
|
|
void WriteDMATransferCount(ULWord deviceNumber, ULWord index, ULWord value);
|
|
void WriteDMANextDescriptorLow(ULWord deviceNumber, ULWord index, ULWord value);
|
|
void WriteDMANextDescriptorHigh(ULWord deviceNumber, ULWord index, ULWord value);
|
|
ULWord ReadDMAControlStatus(ULWord deviceNumber);
|
|
void WriteDMAControlStatus(ULWord deviceNumber,ULWord value);
|
|
void SetDMAEngineStatus(ULWord deviceNumber, int index, bool enable);
|
|
int GetDMAEngineStatus(ULWord deviceNumber, int index);
|
|
ULWord ReadDMAInterruptControl(ULWord deviceNumber);
|
|
void WriteDMAInterruptControl(ULWord deviceNumber, ULWord value);
|
|
void EnableDMAInterrupt(ULWord deviceNumber, NTV2DMAInterruptMask interruptMask);
|
|
void DisableDMAInterrupt(ULWord deviceNumber, NTV2DMAInterruptMask interruptMask);
|
|
void ClearDMAInterrupt(ULWord deviceNumber, NTV2DMAStatusBits clearBit);
|
|
void ClearDMAInterrupts(ULWord deviceNumber);
|
|
|
|
//////////////////////////////////////////////////////////////////
|
|
// Nwl methods
|
|
//
|
|
ULWord ReadNwlRegister(ULWord deviceNumber, ULWord regNum);
|
|
void WriteNwlRegister(ULWord deviceNumber, ULWord regNum, ULWord value);
|
|
bool ConfigureNwlChannels(ULWord deviceNumber);
|
|
bool IsNwlChannel(ULWord deviceNumber, bool bC2H, int index);
|
|
void WriteNwlCommonControlStatus(ULWord deviceNumber, ULWord value);
|
|
void WriteNwlControlStatus(ULWord deviceNumber, bool bC2H, ULWord index, ULWord value);
|
|
void WriteNwlChainStartAddressLow(ULWord deviceNumber, bool bC2H, ULWord index, ULWord value);
|
|
void WriteNwlChainStartAddressHigh(ULWord deviceNumber, bool bC2H, ULWord index, ULWord value);
|
|
ULWord ReadNwlCommonControlStatus(ULWord deviceNumber);
|
|
ULWord ReadNwlCapabilities(ULWord deviceNumber, bool bC2H, ULWord index);
|
|
ULWord ReadNwlControlStatus(ULWord deviceNumber, bool bC2H, ULWord index);
|
|
ULWord ReadNwlHardwareTime(ULWord deviceNumber, bool bC2H, ULWord index);
|
|
ULWord ReadNwlChainCompleteByteCount(ULWord deviceNumber, bool bC2H, ULWord index);
|
|
void ResetNwlHardware(ULWord deviceNumber, bool bC2H, ULWord index);
|
|
void EnableNwlUserInterrupt(ULWord deviceNumber);
|
|
void DisableNwlUserInterrupt(ULWord deviceNumber);
|
|
void EnableNwlDmaInterrupt(ULWord deviceNumber);
|
|
void DisableNwlDmaInterrupt(ULWord deviceNumber);
|
|
void ClearNwlUserInterrupt(ULWord deviceNumber);
|
|
void ClearNwlS2C0Interrupt(ULWord deviceNumber);
|
|
void ClearNwlC2S0Interrupt(ULWord deviceNumber);
|
|
void ClearNwlS2C1Interrupt(ULWord deviceNumber);
|
|
void ClearNwlC2S1Interrupt(ULWord deviceNumber);
|
|
|
|
//////////////////////////////////////////////////////////////////
|
|
// Xlnx methods
|
|
//
|
|
ULWord ReadXlnxRegister(ULWord deviceNumber, ULWord regNum);
|
|
void WriteXlnxRegister(ULWord deviceNumber, ULWord regNum, ULWord value);
|
|
bool ConfigureXlnxChannels(ULWord deviceNumber);
|
|
bool IsXlnxChannel(ULWord deviceNumber, bool bC2H, int index);
|
|
ULWord XlnxChannelRegBase(ULWord deviceNumber, bool bC2H, int index);
|
|
ULWord XlnxSgdmaRegBase(ULWord deviceNumber, bool bC2H, int index);
|
|
ULWord XlnxConfigRegBase(ULWord deviceNumber);
|
|
ULWord XlnxIrqRegBase(ULWord deviceNumber);
|
|
ULWord XlnxIrqBitMask(ULWord deviceNumber, bool bC2H, int index);
|
|
void EnableXlnxUserInterrupt(ULWord deviceNumber, int index);
|
|
void DisableXlnxUserInterrupt(ULWord deviceNumber, int index);
|
|
ULWord ReadXlnxUserInterrupt(ULWord deviceNumber);
|
|
bool IsXlnxUserInterrupt(ULWord deviceNumber, int index, ULWord intReg);
|
|
void EnableXlnxDmaInterrupt(ULWord deviceNumber, bool bC2H, int index);
|
|
void DisableXlnxDmaInterrupt(ULWord deviceNumber, bool bC2H, int index);
|
|
void EnableXlnxDmaInterrupts(ULWord deviceNumber);
|
|
void DisableXlnxDmaInterrupts(ULWord deviceNumber);
|
|
void DisableXlnxInterrupts(ULWord deviceNumber);
|
|
ULWord ReadXlnxDmaInterrupt(ULWord deviceNumber);
|
|
bool IsXlnxDmaInterrupt(ULWord deviceNumber, bool bC2H, int index, ULWord intReg);
|
|
bool StartXlnxDma(ULWord deviceNumber, bool bC2H, int index);
|
|
bool StopXlnxDma(ULWord deviceNumber, bool bC2H, int index);
|
|
void StopAllXlnxDma(ULWord deviceNumber);
|
|
ULWord ReadXlnxDmaStatus(ULWord deviceNumber, bool bC2H, int index);
|
|
ULWord ClearXlnxDmaStatus(ULWord deviceNumber, bool bC2H, int index);
|
|
bool IsXlnxDmaActive(ULWord status);
|
|
bool IsXlnxDmaError(ULWord status);
|
|
bool WaitXlnxDmaActive(ULWord deviceNumber, bool bC2H, int index, bool active);
|
|
void WriteXlnxDmaEngineStartLow(ULWord deviceNumber, bool bC2H, int index, ULWord addressLow);
|
|
void WriteXlnxDmaEngineStartHigh(ULWord deviceNumber, bool bC2H, int index, ULWord addressHigh);
|
|
void WriteXlnxDmaEngineStartAdjacent(ULWord deviceNumber, bool bC2H, int index, ULWord adjacent);
|
|
ULWord ReadXlnxPerformanceCycleCount(ULWord deviceNumber, bool bC2H, int index);
|
|
ULWord ReadXlnxPerformanceDataCount(ULWord deviceNumber, bool bC2H, int index);
|
|
ULWord ReadXlnxMaxReadRequestSize(ULWord deviceNumber);
|
|
|
|
//////////////////////////////////////////////////////////////////
|
|
// Interrupt methods
|
|
//
|
|
void EnableAllInterrupts(ULWord deviceNumber);
|
|
void DisableAllInterrupts(ULWord deviceNumber);
|
|
|
|
void StopAllDMAEngines(ULWord deviceNumber);
|
|
|
|
////////////////////////////////////////////////////////////////////////////////////////////
|
|
// LTC methods (reuses RP188 structure)
|
|
|
|
void SetLTCData (ULWord deviceNumber, NTV2Channel channel, RP188_STRUCT rp188Data);
|
|
void GetLTCData (ULWord deviceNumber, NTV2Channel channel, RP188_STRUCT* rp188Data);
|
|
|
|
////////////////////////////////////////////////////////////////////////////////////////////
|
|
// OEM RP188 methods
|
|
|
|
void SetRP188Data (ULWord deviceNumber, NTV2Channel channel, RP188_STRUCT rp188Data);
|
|
void GetRP188Data (ULWord deviceNumber, NTV2Channel channel, RP188_STRUCT* rp188Data);
|
|
|
|
////////////////////////////////////////////////////////////////////////////////////////////
|
|
// OEM Custom Ancillary Data methods
|
|
|
|
void SetCustomAncillaryDataMode(ULWord deviceNumber, NTV2Channel channel, bool bEnable);
|
|
|
|
void SetCustomAncillaryData (ULWord deviceNumber, NTV2Channel channel, CUSTOM_ANC_STRUCT *customAncInfo);
|
|
|
|
////////////////////////////////////////////////////////////////////////////////////////////
|
|
// OEM UART methods
|
|
void Init422Uart(ULWord deviceNumber);
|
|
#ifdef SOFTWARE_UART_FIFO
|
|
#ifdef UARTRXFIFOSIZE
|
|
ULWord ReadUARTReceiveData(ULWord deviceNumber);
|
|
ULWord ReadUARTReceiveData2(ULWord deviceNumber);
|
|
#endif
|
|
#ifdef UARTTXFIFOSIZE
|
|
void WriteUARTTransmitData(ULWord deviceNumber,ULWord value);
|
|
void WriteUARTTransmitData2(ULWord deviceNumber,ULWord value);
|
|
#endif
|
|
ULWord ReadUARTControl(ULWord deviceNumber);
|
|
ULWord ReadUARTControl2(ULWord deviceNumber);
|
|
#endif // SOFTWARE_UART_FIFO
|
|
|
|
//////////////////////////////////////////////////////////////////
|
|
// OEM Color Correction Methods
|
|
//
|
|
void SetColorCorrectionMode(ULWord deviceNumber, NTV2Channel channel, NTV2ColorCorrectionMode mode);
|
|
ULWord GetColorCorrectionMode(ULWord deviceNumber, NTV2Channel channel);
|
|
void SetColorCorrectionOutputBank (ULWord deviceNumber, NTV2Channel channel, ULWord bank);
|
|
ULWord GetColorCorrectionOutputBank (ULWord deviceNumber, NTV2Channel channel);
|
|
void SetColorCorrectionHostAccessBank (ULWord deviceNumber, NTV2ColorCorrectionHostAccessBank value);
|
|
NTV2ColorCorrectionHostAccessBank GetColorCorrectionHostAccessBank (ULWord deviceNumber, NTV2Channel channel);
|
|
void SetColorCorrectionSaturation (ULWord deviceNumber, NTV2Channel channel, ULWord value);
|
|
ULWord GetColorCorrectionSaturation (ULWord deviceNumber, NTV2Channel channel);
|
|
|
|
//////////////////////////////////////////////////////////////////
|
|
// Utility methods
|
|
//
|
|
bool IsSaveRecallRegister(ULWord deviceNumber, ULWord regNum);
|
|
void GetDeviceSerialNumberWords(ULWord deviceNumber, ULWord *low, ULWord *high);
|
|
void itoa64(ULWord64 i, char *buffer);
|
|
inline void interruptHousekeeping(NTV2PrivateParams* pNTV2Params, INTERRUPT_ENUMS interrupt);
|
|
void InitDNXAddressLUT(unsigned long address);
|
|
|
|
//////////////////////////////////////////////////////////////////
|
|
// P2P methods
|
|
//
|
|
ULWord ReadMessageChannel1(ULWord deviceNumber);
|
|
ULWord ReadMessageChannel2(ULWord deviceNumber);
|
|
ULWord ReadMessageChannel3(ULWord deviceNumber);
|
|
ULWord ReadMessageChannel4(ULWord deviceNumber);
|
|
ULWord ReadMessageChannel5(ULWord deviceNumber);
|
|
ULWord ReadMessageChannel6(ULWord deviceNumber);
|
|
ULWord ReadMessageChannel7(ULWord deviceNumber);
|
|
ULWord ReadMessageChannel8(ULWord deviceNumber);
|
|
|
|
ULWord ReadMessageInterruptStatus(ULWord deviceNumber);
|
|
ULWord ReadMessageInterruptControl(ULWord deviceNumber);
|
|
|
|
void EnableMessageChannel1Interrupt(ULWord deviceNumber);
|
|
void DisableMessageChannel1Interrupt(ULWord deviceNumber);
|
|
void ClearMessageChannel1Interrupt(ULWord deviceNumber);
|
|
|
|
void EnableMessageChannel2Interrupt(ULWord deviceNumber);
|
|
void DisableMessageChannel2Interrupt(ULWord deviceNumber);
|
|
void ClearMessageChannel2Interrupt(ULWord deviceNumber);
|
|
|
|
void EnableMessageChannel3Interrupt(ULWord deviceNumber);
|
|
void DisableMessageChannel3Interrupt(ULWord deviceNumber);
|
|
void ClearMessageChannel3Interrupt(ULWord deviceNumber);
|
|
|
|
void EnableMessageChannel4Interrupt(ULWord deviceNumber);
|
|
void DisableMessageChannel4Interrupt(ULWord deviceNumber);
|
|
void ClearMessageChannel4Interrupt(ULWord deviceNumber);
|
|
|
|
void EnableMessageChannel5Interrupt(ULWord deviceNumber);
|
|
void DisableMessageChannel5Interrupt(ULWord deviceNumber);
|
|
void ClearMessageChannel5Interrupt(ULWord deviceNumber);
|
|
|
|
void EnableMessageChannel6Interrupt(ULWord deviceNumber);
|
|
void DisableMessageChannel6Interrupt(ULWord deviceNumber);
|
|
void ClearMessageChannel6Interrupt(ULWord deviceNumber);
|
|
|
|
void EnableMessageChannel7Interrupt(ULWord deviceNumber);
|
|
void DisableMessageChannel7Interrupt(ULWord deviceNumber);
|
|
void ClearMessageChannel7Interrupt(ULWord deviceNumber);
|
|
|
|
void EnableMessageChannel8Interrupt(ULWord deviceNumber);
|
|
void DisableMessageChannel8Interrupt(ULWord deviceNumber);
|
|
void ClearMessageChannel8Interrupt(ULWord deviceNumber);
|
|
|
|
ULWord ReadFrameApertureOffset(ULWord deviceNumber);
|
|
void WriteFrameApertureOffset(ULWord deviceNumber, ULWord value);
|
|
void WriteFrameAperture(ULWord deviceNumber, ULWord offset, ULWord value);
|
|
|
|
bool DeviceCanDoP2P(ULWord deviceNumber);
|
|
|
|
void SetLUTEnable(ULWord deviceNumber, NTV2Channel channel, ULWord enable);
|
|
void SetLUTV2HostAccessBank(ULWord deviceNumber, NTV2ColorCorrectionHostAccessBank value);
|
|
void SetLUTV2OutputBank(ULWord deviceNumber, NTV2Channel channel, ULWord bank);
|
|
ULWord GetLUTV2OutputBank(ULWord deviceNumber, NTV2Channel channel);
|
|
|
|
ULWord ntv2_getRoundedUpTimeoutJiffies(ULWord timeOutMs);
|
|
|
|
#endif // !REGISTERIO_H
|